Commit 418af7ee authored by Kanak Shilledar's avatar Kanak Shilledar Committed by Greg Kroah-Hartman
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dt-bindings: serial: vt8500-uart: convert to json-schema



Convert the VIA VT8500 and WonderMedia WM8xxx UART Controller to
newer DT schema. Created DT schema based on the .txt file which had
`compatible`, `reg`, `interrupts` and `clocks` as required properties.

Additions to the original binding
- changed the file name from vt8500-uart to via,vt8500-uart.yaml
- removed unnecessary alias from the example.

Signed-off-by: default avatarKanak Shilledar <kanakshilledar@gmail.com>
Acked-by: default avatarAlexey Charkov <alchark@gmail.com>
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240612153847.52647-2-kanakshilledar@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent efa6b0a1
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2
---
$id: http://devicetree.org/schemas/serial/via,vt8500-uart.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: VIA VT8500 and WonderMedia WM8xxx UART Controller

maintainers:
  - Alexey Charkov <alchark@gmail.com>

allOf:
  - $ref: serial.yaml

properties:
  compatible:
    enum:
      - via,vt8500-uart # up to WM8850/WM8950
      - wm,wm8880-uart  # for WM8880 and later

  clocks:
    maxItems: 1

  interrupts:
    maxItems: 1

  reg:
    maxItems: 1

required:
  - compatible
  - clocks
  - interrupts
  - reg

unevaluatedProperties: false

examples:
  - |
    serial@d8200000 {
        compatible = "via,vt8500-uart";
        reg = <0xd8200000 0x1040>;
        interrupts = <32>;
        clocks = <&clkuart0>;
    };
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* VIA VT8500 and WonderMedia WM8xxx UART Controller

Required properties:
- compatible: should be "via,vt8500-uart" (for VIA/WonderMedia chips up to and
	including WM8850/WM8950), or "wm,wm8880-uart" (for WM8880 and later)

- reg: base physical address of the controller and length of memory mapped
	region.

- interrupts: hardware interrupt number

- clocks: shall be the input parent clock phandle for the clock. This should
	be the 24Mhz reference clock.

Aliases may be defined to ensure the correct ordering of the uarts.

Example:
	aliases {
		serial0 = &uart0;
	};

	uart0: serial@d8200000 {
		compatible = "via,vt8500-uart";
		reg = <0xd8200000 0x1040>;
		interrupts = <32>;
		clocks = <&clkuart0>;
	};