Commit 41ae1407 authored by Daniel Machon's avatar Daniel Machon Committed by Jakub Kicinski
Browse files

net: sparx5: configure serdes for 1000BASE-X in sparx5_port_init() 



sparx5_port_init() only invokes sparx5_serdes_set() and the associated
shadow-device enable and low-speed device switch for SGMII and QSGMII.
On any port with a high-speed primary device (DEV5G/DEV10G/DEV25G)
configured for 1000BASE-X the serdes is therefore left uninitialized,
the DEV2G5 shadow is never enabled, and the port stays pointed at its
high-speed device rather than the DEV2G5. The PCS1G block looks
healthy in isolation, but no frames reach the link partner.

Add 1000BASE-X to the check so the same three steps run.

Note: the same issue might apply to 2500BASE-X, but that will,
eventually, be addressed in a separate commit.

Reported-by: default avatarAndrew Lunn <andrew@lunn.ch>
Fixes: 946e7fd5 ("net: sparx5: add port module support")
Signed-off-by: default avatarDaniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20260506-misc-fixes-sparx5-lan969x-v2-4-fb236aa96908@microchip.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent b131dc93

drivers/net/ethernet/microchip/sparx5/sparx5_port.c

+2 −1
Original line number Diff line number Diff line
@@ -1128,7 +1128,8 @@ int sparx5_port_init(struct sparx5 *sparx5, 
		DEV2G5_PCS1G_SD_CFG(port->portno));



	if (conf->portmode == PHY_INTERFACE_MODE_QSGMII ||

	    conf->portmode == PHY_INTERFACE_MODE_SGMII) {

	    conf->portmode == PHY_INTERFACE_MODE_SGMII ||

	    conf->portmode == PHY_INTERFACE_MODE_1000BASEX) {

		err = sparx5_serdes_set(sparx5, port, conf);

		if (err)

			return err;