Commit 41b08610 authored by Inochi Amaoto's avatar Inochi Amaoto
Browse files

clk: sophgo: Add clock controller support for SG2044 SoC 



Add clock driver and clock definition for SG2044 SoC.

Reviewed-by: default avatarChen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/20250418020325.421257-6-inochiama@gmail.com


Signed-off-by: default avatarInochi Amaoto <inochiama@gmail.com>
Signed-off-by: default avatarChen Wang <unicorn_wang@outlook.com>
Signed-off-by: default avatarChen Wang <wangchen20@iscas.ac.cn>
parent ff524079

drivers/clk/sophgo/Kconfig

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Original line number Diff line number Diff line
@@ -38,6 +38,15 @@ config CLK_SOPHGO_SG2042_RPGATE 
	  clock from Clock Generator IP as input.

	  This driver provides Gate function for RP.



config CLK_SOPHGO_SG2044

	tristate "Sophgo SG2044 clock controller support"

	depends on ARCH_SOPHGO || COMPILE_TEST

	help

	  This driver supports the clock controller on the Sophgo SG2044

	  SoC. This controller requires mulitple PLL clock as input.

	  This clock control provides PLL clocks and common clock function

	  for various IPs on the SoC.



config CLK_SOPHGO_SG2044_PLL

	tristate "Sophgo SG2044 PLL clock controller support"

	depends on ARCH_SOPHGO || COMPILE_TEST

drivers/clk/sophgo/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -9,4 +9,5 @@ clk-sophgo-cv1800-y += clk-cv18xx-pll.o 
obj-$(CONFIG_CLK_SOPHGO_SG2042_CLKGEN)	+= clk-sg2042-clkgen.o

obj-$(CONFIG_CLK_SOPHGO_SG2042_PLL)	+= clk-sg2042-pll.o

obj-$(CONFIG_CLK_SOPHGO_SG2042_RPGATE)	+= clk-sg2042-rpgate.o

obj-$(CONFIG_CLK_SOPHGO_SG2044)		+= clk-sg2044.o

obj-$(CONFIG_CLK_SOPHGO_SG2044_PLL)	+= clk-sg2044-pll.o

drivers/clk/sophgo/clk-sg2044.c

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