Unverified Commit 41b5c85b authored by Mark Brown's avatar Mark Brown
Browse files

regulator: max77838: add max77838 regulator driver

Merge series from Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>:

This patchset adds support for the max77838 PMIC. It's used on the Galaxy
S7 lineup of phones, and provides regulators for the display.
parents 2e0fd458 6a1f303c
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@@ -589,6 +589,7 @@ Nikolay Aleksandrov <razor@blackwall.org> <nikolay@redhat.com>
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@cumulusnetworks.com>
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@nvidia.com>
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@isovalent.com>
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba> <nobuhiro1.iwamatsu@toshiba.co.jp>
Odelu Kukatla <quic_okukatla@quicinc.com> <okukatla@codeaurora.org>
Oleksandr Natalenko <oleksandr@natalenko.name> <oleksandr@redhat.com>
Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net>
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@@ -3222,6 +3222,10 @@ D: AIC5800 IEEE 1394, RAW I/O on 1394
D: Starter of Linux1394 effort
S: ask per mail for current address

N: Boris Pismenny
E: borisp@mellanox.com
D: Kernel TLS implementation and offload support.

N: Nicolas Pitre
E: nico@fluxnic.net
D: StrongARM SA1100 support integrator & hacker
@@ -4168,6 +4172,9 @@ S: 1513 Brewster Dr.
S: Carrollton, TX 75010
S: USA

N: Dave Watson
D: Kernel TLS implementation.

N: Tim Waugh
E: tim@cyberelk.net
D: Co-architect of the parallel-port sharing system
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@@ -586,6 +586,7 @@ What: /sys/devices/system/cpu/vulnerabilities
		/sys/devices/system/cpu/vulnerabilities/srbds
		/sys/devices/system/cpu/vulnerabilities/tsa
		/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
		/sys/devices/system/cpu/vulnerabilities/vmscape
Date:		January 2018
Contact:	Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description:	Information about CPU vulnerabilities
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@@ -215,7 +215,7 @@ Spectre_v2 X X
Spectre_v2_user                      X                           X            *       (Note 1)
SRBDS                 X              X            X              X
SRSO                  X              X            X              X
SSB                                                                                   (Note 4)
SSB                                  X
TAA                   X              X            X              X            *       (Note 2)
TSA                   X              X            X              X
=============== ============== ============ ============= ============== ============ ========
@@ -229,9 +229,6 @@ Notes:
   3 --  Disables SMT if cross-thread mitigations are fully enabled, the CPU is
   vulnerable, and STIBP is not supported

   4 --  Speculative store bypass is always enabled by default (no kernel
   mitigation applied) unless overridden with spec_store_bypass_disable option

When an attack-vector is disabled, all mitigations for the vulnerabilities
listed in the above table are disabled, unless mitigation is required for a
different enabled attack-vector or a mitigation is explicitly selected via a
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@@ -26,3 +26,4 @@ are configurable at compile, boot or run time.
   rsb
   old_microcode
   indirect-target-selection
   vmscape
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