Commit 41caaf51 authored Sep 07, 2024 by Dmitry Baryshkov Committed by Bjorn Andersson Oct 06, 2024

arm64: dts: qcom: sdm630: enable A2NOC and LPASS SMMU



Now as the arm-smmu-qcom driver gained workarounds for the A2NOC and
LPASS SMMU devices, enable those two devices.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240907-sdm660-wifi-v1-5-e316055142f8@linaro.org


Signed-off-by: Bjorn Andersson <andersson@kernel.org>

parent 1dd7d9d4

arch/arm64/boot/dts/qcom/sdm630.dtsi

+0 −4

Original line number	Diff line number	Diff line
		@@ -665,8 +665,6 @@ anoc2_smmu: iommu@16c0000 {
		<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
		<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
		<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;

		status = "disabled";
		};

		a2noc: interconnect@1704000 {
		@@ -1234,8 +1232,6 @@ lpass_smmu: iommu@5100000 {
		<GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>,
		<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
		<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;

		status = "disabled";
		};

		sram@290000 {