Commit 42736071 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'mediatek-drm-fixes-20241028' of... 

Merge tag 'mediatek-drm-fixes-20241028' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux

 into drm-fixes

Mediatek DRM Fixes - 20241028

1. Fix degradation problem of alpha blending
2. Fix color format MACROs in OVL
3. Fix get efuse issue for MT8188 DPTX
4. Fix potential NULL dereference in mtk_crtc_destroy()
5. Correct dpi power-domains property
6. Add split subschema property constraints

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20241028135846.3570-1-chunkuang.hu@kernel.org
parents 8594a2d8 3ad0edc4

Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml

+10 −14
Original line number Diff line number Diff line
@@ -63,6 +63,16 @@ properties: 
      - const: sleep



  power-domains:

    description: |

      The MediaTek DPI module is typically associated with one of the

      following multimedia power domains:

        POWER_DOMAIN_DISPLAY

        POWER_DOMAIN_VDOSYS

        POWER_DOMAIN_MM

      The specific power domain used varies depending on the SoC design.



      It is recommended to explicitly add the appropriate power domain

      property to the DPI node in the device tree.

    maxItems: 1



  port:
@@ -79,20 +89,6 @@ required: 
  - clock-names

  - port



allOf:

  - if:

      not:

        properties:

          compatible:

            contains:

              enum:

                - mediatek,mt6795-dpi

                - mediatek,mt8173-dpi

                - mediatek,mt8186-dpi

    then:

      properties:

        power-domains: false



additionalProperties: false



examples:

Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml

+19 −0
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ properties: 
    description: A phandle and PM domain specifier as defined by bindings of

      the power controller specified by phandle. See

      Documentation/devicetree/bindings/power/power-domain.yaml for details.

    maxItems: 1



  mediatek,gce-client-reg:

    description:
@@ -57,6 +58,9 @@ properties: 
  clocks:

    items:

      - description: SPLIT Clock

      - description: Used for interfacing with the HDMI RX signal source.

      - description: Paired with receiving HDMI RX metadata.

    minItems: 1



required:

  - compatible
@@ -72,9 +76,24 @@ allOf: 
            const: mediatek,mt8195-mdp3-split



    then:

      properties:

        clocks:

          minItems: 3



      required:

        - mediatek,gce-client-reg



  - if:

      properties:

        compatible:

          contains:

            const: mediatek,mt8173-disp-split



    then:

      properties:

        clocks:

          maxItems: 1



additionalProperties: false



examples:

drivers/gpu/drm/mediatek/mtk_crtc.c

+2 −2
Original line number Diff line number Diff line
@@ -127,9 +127,8 @@ static void mtk_crtc_destroy(struct drm_crtc *crtc) 


	mtk_mutex_put(mtk_crtc->mutex);

#if IS_REACHABLE(CONFIG_MTK_CMDQ)

	cmdq_pkt_destroy(&mtk_crtc->cmdq_client, &mtk_crtc->cmdq_handle);



	if (mtk_crtc->cmdq_client.chan) {

		cmdq_pkt_destroy(&mtk_crtc->cmdq_client, &mtk_crtc->cmdq_handle);

		mbox_free_channel(mtk_crtc->cmdq_client.chan);

		mtk_crtc->cmdq_client.chan = NULL;

	}
@@ -913,6 +912,7 @@ static int mtk_crtc_init_comp_planes(struct drm_device *drm_dev, 
				BIT(pipe),

				mtk_crtc_plane_type(mtk_crtc->layer_nr, num_planes),

				mtk_ddp_comp_supported_rotations(comp),

				mtk_ddp_comp_get_blend_modes(comp),

				mtk_ddp_comp_get_formats(comp),

				mtk_ddp_comp_get_num_formats(comp), i);

		if (ret)

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

+2 −0
Original line number Diff line number Diff line
@@ -363,6 +363,7 @@ static const struct mtk_ddp_comp_funcs ddp_ovl = { 
	.layer_config = mtk_ovl_layer_config,

	.bgclr_in_on = mtk_ovl_bgclr_in_on,

	.bgclr_in_off = mtk_ovl_bgclr_in_off,

	.get_blend_modes = mtk_ovl_get_blend_modes,

	.get_formats = mtk_ovl_get_formats,

	.get_num_formats = mtk_ovl_get_num_formats,

};
@@ -416,6 +417,7 @@ static const struct mtk_ddp_comp_funcs ddp_ovl_adaptor = { 
	.disconnect = mtk_ovl_adaptor_disconnect,

	.add = mtk_ovl_adaptor_add_comp,

	.remove = mtk_ovl_adaptor_remove_comp,

	.get_blend_modes = mtk_ovl_adaptor_get_blend_modes,

	.get_formats = mtk_ovl_adaptor_get_formats,

	.get_num_formats = mtk_ovl_adaptor_get_num_formats,

	.mode_valid = mtk_ovl_adaptor_mode_valid,

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

+10 −0
Original line number Diff line number Diff line
@@ -80,6 +80,7 @@ struct mtk_ddp_comp_funcs { 
	void (*ctm_set)(struct device *dev,

			struct drm_crtc_state *state);

	struct device * (*dma_dev_get)(struct device *dev);

	u32 (*get_blend_modes)(struct device *dev);

	const u32 *(*get_formats)(struct device *dev);

	size_t (*get_num_formats)(struct device *dev);

	void (*connect)(struct device *dev, struct device *mmsys_dev, unsigned int next);
@@ -266,6 +267,15 @@ static inline struct device *mtk_ddp_comp_dma_dev_get(struct mtk_ddp_comp *comp) 
	return comp->dev;

}



static inline

u32 mtk_ddp_comp_get_blend_modes(struct mtk_ddp_comp *comp)

{

	if (comp->funcs && comp->funcs->get_blend_modes)

		return comp->funcs->get_blend_modes(comp->dev);



	return 0;

}



static inline

const u32 *mtk_ddp_comp_get_formats(struct mtk_ddp_comp *comp)

{