Commit 42813136 authored by Gayatri Kammela's avatar Gayatri Kammela Committed by Hans de Goede
Browse files

platform/x86: intel_pmc_core: Get LPM requirements for Tiger Lake 



Platforms that support low power modes (LPM) such as Tiger Lake maintain
requirements for each sub-state that a readable in the PMC. However, unlike
LPM status registers, requirement registers are not memory mapped but are
available from an ACPI _DSM. Collect the requirements for Tiger Lake using
the _DSM method and store in a buffer.

Signed-off-by: default avatarGayatri Kammela <gayatri.kammela@intel.com>
Co-developed-by: default avatarDavid E. Box <david.e.box@linux.intel.com>
Signed-off-by: default avatarDavid E. Box <david.e.box@linux.intel.com>
Reviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20210417031252.3020837-6-david.e.box@linux.intel.com


Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
parent 29c2dd88

drivers/platform/x86/intel_pmc_core.c

+56 −0
Original line number Diff line number Diff line
@@ -23,7 +23,9 @@ 
#include <linux/slab.h>

#include <linux/suspend.h>

#include <linux/uaccess.h>

#include <linux/uuid.h>



#include <acpi/acpi_bus.h>

#include <asm/cpu_device_id.h>

#include <asm/intel-family.h>

#include <asm/msr.h>
@@ -31,6 +33,9 @@ 


#include "intel_pmc_core.h"



#define ACPI_S0IX_DSM_UUID		"57a6512e-3979-4e9d-9708-ff13b2508972"

#define ACPI_GET_LOW_MODE_REGISTERS	1



/* PKGC MSRs are common across Intel Core SoCs */

static const struct pmc_bit_map msr_map[] = {

	{"Package C2",                  MSR_PKG_C2_RESIDENCY},
@@ -590,6 +595,53 @@ static const struct pmc_reg_map tgl_reg_map = { 
	.etr3_offset = ETR3_OFFSET,

};



static void pmc_core_get_tgl_lpm_reqs(struct platform_device *pdev)

{

	struct pmc_dev *pmcdev = platform_get_drvdata(pdev);

	const int num_maps = pmcdev->map->lpm_num_maps;

	u32 lpm_size = LPM_MAX_NUM_MODES * num_maps * 4;

	union acpi_object *out_obj;

	struct acpi_device *adev;

	guid_t s0ix_dsm_guid;

	u32 *lpm_req_regs, *addr;



	adev = ACPI_COMPANION(&pdev->dev);

	if (!adev)

		return;



	guid_parse(ACPI_S0IX_DSM_UUID, &s0ix_dsm_guid);



	out_obj = acpi_evaluate_dsm(adev->handle, &s0ix_dsm_guid, 0,

				    ACPI_GET_LOW_MODE_REGISTERS, NULL);

	if (out_obj && out_obj->type == ACPI_TYPE_BUFFER) {

		u32 size = out_obj->buffer.length;



		if (size != lpm_size) {

			acpi_handle_debug(adev->handle,

				"_DSM returned unexpected buffer size, have %u, expect %u\n",

				size, lpm_size);

			goto free_acpi_obj;

		}

	} else {

		acpi_handle_debug(adev->handle,

				  "_DSM function 0 evaluation failed\n");

		goto free_acpi_obj;

	}



	addr = (u32 *)out_obj->buffer.pointer;



	lpm_req_regs = devm_kzalloc(&pdev->dev, lpm_size * sizeof(u32),

				     GFP_KERNEL);

	if (!lpm_req_regs)

		goto free_acpi_obj;



	memcpy(lpm_req_regs, addr, lpm_size);

	pmcdev->lpm_req_regs = lpm_req_regs;



free_acpi_obj:

	ACPI_FREE(out_obj);

}



static inline u32 pmc_core_reg_read(struct pmc_dev *pmcdev, int reg_offset)

{

	return readl(pmcdev->regbase + reg_offset);
@@ -1424,10 +1476,14 @@ static int pmc_core_probe(struct platform_device *pdev) 
		return -ENOMEM;



	mutex_init(&pmcdev->lock);



	pmcdev->pmc_xram_read_bit = pmc_core_check_read_lock_bit(pmcdev);

	pmc_core_get_low_power_modes(pmcdev);

	pmc_core_do_dmi_quirks(pmcdev);



	if (pmcdev->map == &tgl_reg_map)

		pmc_core_get_tgl_lpm_reqs(pdev);



	/*

	 * On TGL, due to a hardware limitation, the GBE LTR blocks PC10 when

	 * a cable is attached. Tell the PMC to ignore it.

drivers/platform/x86/intel_pmc_core.h

+2 −0
Original line number Diff line number Diff line
@@ -294,6 +294,7 @@ struct pmc_reg_map { 
 * @s0ix_counter:	S0ix residency (step adjusted)

 * @num_lpm_modes:	Count of enabled modes

 * @lpm_en_modes:	Array of enabled modes from lowest to highest priority

 * @lpm_req_regs:	List of substate requirements

 *

 * pmc_dev contains info about power management controller device.

 */
@@ -310,6 +311,7 @@ struct pmc_dev { 
	u64 s0ix_counter;

	int num_lpm_modes;

	int lpm_en_modes[LPM_MAX_NUM_MODES];

	u32 *lpm_req_regs;

};



#define pmc_for_each_mode(i, mode, pmcdev)		\