Loading arch/mips/kernel/smp-mt.c +3 −3 Original line number Diff line number Diff line Loading @@ -287,7 +287,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * (unsigned long)idle->thread_info the gp * assumes a 1:1 mapping of TC => VPE */ void prom_boot_secondary(int cpu, struct task_struct *idle) void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { struct thread_info *gp = task_thread_info(idle); dvpe(); Loading Loading @@ -321,7 +321,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) evpe(EVPE_ENABLE); } void prom_init_secondary(void) void __cpuinit prom_init_secondary(void) { /* Enable per-cpu interrupts */ Loading @@ -330,7 +330,7 @@ void prom_init_secondary(void) (STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP6 | STATUSF_IP7)); } void prom_smp_finish(void) void __cpuinit prom_smp_finish(void) { write_c0_compare(read_c0_count() + (8* mips_hpt_frequency/HZ)); Loading arch/mips/mips-boards/malta/malta_smtc.c +3 −3 Original line number Diff line number Diff line Loading @@ -24,7 +24,7 @@ void core_send_ipi(int cpu, unsigned int action) * Platform "CPU" startup hook */ void prom_boot_secondary(int cpu, struct task_struct *idle) void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { smtc_boot_secondary(cpu, idle); } Loading @@ -33,7 +33,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) * Post-config but pre-boot cleanup entry point */ void prom_init_secondary(void) void __cpuinit prom_init_secondary(void) { void smtc_init_secondary(void); int myvpe; Loading Loading @@ -75,7 +75,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * SMP initialization finalization entry point */ void prom_smp_finish(void) void __cpuinit prom_smp_finish(void) { smtc_smp_finish(); } Loading arch/mips/mipssim/sim_smp.c +3 −3 Original line number Diff line number Diff line Loading @@ -53,7 +53,7 @@ void core_send_ipi(int cpu, unsigned int action) * Platform "CPU" startup hook */ void prom_boot_secondary(int cpu, struct task_struct *idle) void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { #ifdef CONFIG_MIPS_MT_SMTC smtc_boot_secondary(cpu, idle); Loading @@ -64,7 +64,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) * Post-config but pre-boot cleanup entry point */ void prom_init_secondary(void) void __cpuinit prom_init_secondary(void) { #ifdef CONFIG_MIPS_MT_SMTC void smtc_init_secondary(void); Loading Loading @@ -103,7 +103,7 @@ void plat_prepare_cpus(unsigned int max_cpus) * SMP initialization finalization entry point */ void prom_smp_finish(void) void __cpuinit prom_smp_finish(void) { #ifdef CONFIG_MIPS_MT_SMTC smtc_smp_finish(); Loading arch/mips/pmc-sierra/yosemite/smp.c +3 −3 Original line number Diff line number Diff line Loading @@ -77,7 +77,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * stack so the first thing we do is throw away that stuff and load useful * values into the registers ... */ void __init prom_boot_secondary(int cpu, struct task_struct *idle) void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { unsigned long gp = (unsigned long) task_thread_info(idle); unsigned long sp = __KSTK_TOS(idle); Loading @@ -97,12 +97,12 @@ void prom_cpus_done(void) * After we've done initial boot, this function is called to allow the * board code to clean up state, if needed */ void prom_init_secondary(void) void __cpuinit prom_init_secondary(void) { set_c0_status(ST0_CO | ST0_IE | ST0_IM); } void prom_smp_finish(void) void __cpuinit prom_smp_finish(void) { } Loading arch/mips/qemu/q-smp.c +3 −3 Original line number Diff line number Diff line Loading @@ -22,11 +22,11 @@ void core_send_ipi(int cpu, unsigned int action) * After we've done initial boot, this function is called to allow the * board code to clean up state, if needed */ void prom_init_secondary(void) void __cpuinit prom_init_secondary(void) { } void prom_smp_finish(void) void __cpuinit prom_smp_finish(void) { } Loading @@ -43,7 +43,7 @@ void __init prom_prepare_cpus(unsigned int max_cpus) /* * Firmware CPU startup hook */ void prom_boot_secondary(int cpu, struct task_struct *idle) void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { } Loading Loading
arch/mips/kernel/smp-mt.c +3 −3 Original line number Diff line number Diff line Loading @@ -287,7 +287,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * (unsigned long)idle->thread_info the gp * assumes a 1:1 mapping of TC => VPE */ void prom_boot_secondary(int cpu, struct task_struct *idle) void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { struct thread_info *gp = task_thread_info(idle); dvpe(); Loading Loading @@ -321,7 +321,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) evpe(EVPE_ENABLE); } void prom_init_secondary(void) void __cpuinit prom_init_secondary(void) { /* Enable per-cpu interrupts */ Loading @@ -330,7 +330,7 @@ void prom_init_secondary(void) (STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP6 | STATUSF_IP7)); } void prom_smp_finish(void) void __cpuinit prom_smp_finish(void) { write_c0_compare(read_c0_count() + (8* mips_hpt_frequency/HZ)); Loading
arch/mips/mips-boards/malta/malta_smtc.c +3 −3 Original line number Diff line number Diff line Loading @@ -24,7 +24,7 @@ void core_send_ipi(int cpu, unsigned int action) * Platform "CPU" startup hook */ void prom_boot_secondary(int cpu, struct task_struct *idle) void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { smtc_boot_secondary(cpu, idle); } Loading @@ -33,7 +33,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) * Post-config but pre-boot cleanup entry point */ void prom_init_secondary(void) void __cpuinit prom_init_secondary(void) { void smtc_init_secondary(void); int myvpe; Loading Loading @@ -75,7 +75,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * SMP initialization finalization entry point */ void prom_smp_finish(void) void __cpuinit prom_smp_finish(void) { smtc_smp_finish(); } Loading
arch/mips/mipssim/sim_smp.c +3 −3 Original line number Diff line number Diff line Loading @@ -53,7 +53,7 @@ void core_send_ipi(int cpu, unsigned int action) * Platform "CPU" startup hook */ void prom_boot_secondary(int cpu, struct task_struct *idle) void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { #ifdef CONFIG_MIPS_MT_SMTC smtc_boot_secondary(cpu, idle); Loading @@ -64,7 +64,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) * Post-config but pre-boot cleanup entry point */ void prom_init_secondary(void) void __cpuinit prom_init_secondary(void) { #ifdef CONFIG_MIPS_MT_SMTC void smtc_init_secondary(void); Loading Loading @@ -103,7 +103,7 @@ void plat_prepare_cpus(unsigned int max_cpus) * SMP initialization finalization entry point */ void prom_smp_finish(void) void __cpuinit prom_smp_finish(void) { #ifdef CONFIG_MIPS_MT_SMTC smtc_smp_finish(); Loading
arch/mips/pmc-sierra/yosemite/smp.c +3 −3 Original line number Diff line number Diff line Loading @@ -77,7 +77,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * stack so the first thing we do is throw away that stuff and load useful * values into the registers ... */ void __init prom_boot_secondary(int cpu, struct task_struct *idle) void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { unsigned long gp = (unsigned long) task_thread_info(idle); unsigned long sp = __KSTK_TOS(idle); Loading @@ -97,12 +97,12 @@ void prom_cpus_done(void) * After we've done initial boot, this function is called to allow the * board code to clean up state, if needed */ void prom_init_secondary(void) void __cpuinit prom_init_secondary(void) { set_c0_status(ST0_CO | ST0_IE | ST0_IM); } void prom_smp_finish(void) void __cpuinit prom_smp_finish(void) { } Loading
arch/mips/qemu/q-smp.c +3 −3 Original line number Diff line number Diff line Loading @@ -22,11 +22,11 @@ void core_send_ipi(int cpu, unsigned int action) * After we've done initial boot, this function is called to allow the * board code to clean up state, if needed */ void prom_init_secondary(void) void __cpuinit prom_init_secondary(void) { } void prom_smp_finish(void) void __cpuinit prom_smp_finish(void) { } Loading @@ -43,7 +43,7 @@ void __init prom_prepare_cpus(unsigned int max_cpus) /* * Firmware CPU startup hook */ void prom_boot_secondary(int cpu, struct task_struct *idle) void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { } Loading