Commit 42ae6448 authored by Chao Gao's avatar Chao Gao Committed by Sean Christopherson
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KVM: nVMX: Advertise new VM-Entry/Exit control bits for CET state 



Advertise the LOAD_CET_STATE VM-Entry/Exit control bits in the nested VMX
MSRS, as all nested support for CET virtualization, including consistency
checks, is in place.

Advertise support if and only if KVM supports at least one of IBT or SHSTK.
While it's userspace's responsibility to provide a consistent CPU model to
the guest, that doesn't mean KVM should set userspace up to fail.

Note, the existing {CLEAR,LOAD}_BNDCFGS behavior predates
KVM_X86_QUIRK_STUFF_FEATURE_MSRS, i.e. KVM "solved" the inconsistent CPU
model problem by overwriting the VMX MSRs provided by userspace.

Signed-off-by: default avatarChao Gao <chao.gao@intel.com>
Link: https://lore.kernel.org/r/20250919223258.1604852-35-seanjc@google.com


Co-developed-by: default avatarSean Christopherson <seanjc@google.com>
Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
parent 62f7533a

arch/x86/kvm/vmx/nested.c

+11 −2
Original line number Diff line number Diff line
@@ -7179,13 +7179,17 @@ static void nested_vmx_setup_exit_ctls(struct vmcs_config *vmcs_conf, 
		VM_EXIT_HOST_ADDR_SPACE_SIZE |

#endif

		VM_EXIT_LOAD_IA32_PAT | VM_EXIT_SAVE_IA32_PAT |

		VM_EXIT_CLEAR_BNDCFGS;

		VM_EXIT_CLEAR_BNDCFGS | VM_EXIT_LOAD_CET_STATE;

	msrs->exit_ctls_high |=

		VM_EXIT_ALWAYSON_WITHOUT_TRUE_MSR |

		VM_EXIT_LOAD_IA32_EFER | VM_EXIT_SAVE_IA32_EFER |

		VM_EXIT_SAVE_VMX_PREEMPTION_TIMER | VM_EXIT_ACK_INTR_ON_EXIT |

		VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL;



	if (!kvm_cpu_cap_has(X86_FEATURE_SHSTK) &&

	    !kvm_cpu_cap_has(X86_FEATURE_IBT))

		msrs->exit_ctls_high &= ~VM_EXIT_LOAD_CET_STATE;



	/* We support free control of debug control saving. */

	msrs->exit_ctls_low &= ~VM_EXIT_SAVE_DEBUG_CONTROLS;

}
@@ -7201,11 +7205,16 @@ static void nested_vmx_setup_entry_ctls(struct vmcs_config *vmcs_conf, 
#ifdef CONFIG_X86_64

		VM_ENTRY_IA32E_MODE |

#endif

		VM_ENTRY_LOAD_IA32_PAT | VM_ENTRY_LOAD_BNDCFGS;

		VM_ENTRY_LOAD_IA32_PAT | VM_ENTRY_LOAD_BNDCFGS |

		VM_ENTRY_LOAD_CET_STATE;

	msrs->entry_ctls_high |=

		(VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR | VM_ENTRY_LOAD_IA32_EFER |

		 VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL);



	if (!kvm_cpu_cap_has(X86_FEATURE_SHSTK) &&

	    !kvm_cpu_cap_has(X86_FEATURE_IBT))

		msrs->entry_ctls_high &= ~VM_ENTRY_LOAD_CET_STATE;



	/* We support free control of debug control loading. */

	msrs->entry_ctls_low &= ~VM_ENTRY_LOAD_DEBUG_CONTROLS;

}