Commit 43cb0a21 authored by Raviteja Laggyshetty's avatar Raviteja Laggyshetty Committed by Georgi Djakov
Browse files

dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Mahua SoC 



Document the RPMh Network-on-Chip (NoC) interconnect for the Qualcomm
Mahua platform.

Mahua is a derivative of the Glymur SoC. Many interconnect nodes are
identical and continue to use Glymur fallback compatibles. Mahua
introduces SoC-specific configurations and topologies for several
NoC blocks, including CNOC, HSCNOC, PCIe West ANoC/Slave NoCs.
This updates the existing Glymur yaml schema to include Mahua-specific
compatible strings, using two-cell "fallback" compatibles wherever
the hardware is identical with Glymur.

Co-developed-by: default avatarOdelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Signed-off-by: default avatarOdelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Acked-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: default avatarRaviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://msgid.link/20260209-mahua_icc-v3-1-c65f3dfd72c8@oss.qualcomm.com


Signed-off-by: default avatarGeorgi Djakov <djakov@kernel.org>
parent 6de23f81

Documentation/devicetree/bindings/interconnect/qcom,glymur-rpmh.yaml

+111 −25
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ 
$id: http://devicetree.org/schemas/interconnect/qcom,glymur-rpmh.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm RPMh Network-On-Chip Interconnect on GLYMUR

title: Qualcomm RPMh Network-On-Chip Interconnect on Glymur and Mahua SoCs



maintainers:

  - Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
@@ -21,7 +21,72 @@ description: | 


properties:

  compatible:

    enum:

    oneOf:

      - items:

          - enum:

              - qcom,mahua-aggre1-noc

          - const: qcom,glymur-aggre1-noc

      - items:

          - enum:

              - qcom,mahua-aggre2-noc

          - const: qcom,glymur-aggre2-noc

      - items:

          - enum:

              - qcom,mahua-aggre3-noc

          - const: qcom,glymur-aggre3-noc

      - items:

          - enum:

              - qcom,mahua-aggre4-noc

          - const: qcom,glymur-aggre4-noc

      - items:

          - enum:

              - qcom,mahua-clk-virt

          - const: qcom,glymur-clk-virt

      - items:

          - enum:

              - qcom,mahua-cnoc-main

          - const: qcom,glymur-cnoc-main

      - items:

          - enum:

              - qcom,mahua-lpass-ag-noc

          - const: qcom,glymur-lpass-ag-noc

      - items:

          - enum:

              - qcom,mahua-lpass-lpiaon-noc

          - const: qcom,glymur-lpass-lpiaon-noc

      - items:

          - enum:

              - qcom,mahua-lpass-lpicx-noc

          - const: qcom,glymur-lpass-lpicx-noc

      - items:

          - enum:

              - qcom,mahua-mmss-noc

          - const: qcom,glymur-mmss-noc

      - items:

          - enum:

              - qcom,mahua-nsinoc

          - const: qcom,glymur-nsinoc

      - items:

          - enum:

              - qcom,mahua-nsp-noc

          - const: qcom,glymur-nsp-noc

      - items:

          - enum:

              - qcom,mahua-oobm-ss-noc

          - const: qcom,glymur-oobm-ss-noc

      - items:

          - enum:

              - qcom,mahua-pcie-east-anoc

          - const: qcom,glymur-pcie-east-anoc

      - items:

          - enum:

              - qcom,mahua-pcie-east-slv-noc

          - const: qcom,glymur-pcie-east-slv-noc

      - items:

          - enum:

              - qcom,mahua-system-noc

          - const: qcom,glymur-system-noc

      - enum:

          - qcom,glymur-aggre1-noc

          - qcom,glymur-aggre2-noc

          - qcom,glymur-aggre3-noc
@@ -43,6 +108,11 @@ properties: 
          - qcom,glymur-pcie-west-anoc

          - qcom,glymur-pcie-west-slv-noc

          - qcom,glymur-system-noc

          - qcom,mahua-cnoc-cfg

          - qcom,mahua-hscnoc

          - qcom,mahua-mc-virt

          - qcom,mahua-pcie-west-anoc

          - qcom,mahua-pcie-west-slv-noc



  reg:

    maxItems: 1
@@ -63,6 +133,7 @@ allOf: 
            enum:

              - qcom,glymur-clk-virt

              - qcom,glymur-mc-virt

              - qcom,mahua-mc-virt

    then:

      properties:

        reg: false
@@ -85,6 +156,20 @@ allOf: 
            - description: aggre PCIE_4 WEST AXI clock

            - description: aggre PCIE_6 WEST AXI clock



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,mahua-pcie-west-anoc

    then:

      properties:

        clocks:

          items:

            - description: aggre PCIE_3B WEST AXI clock

            - description: aggre PCIE_4 WEST AXI clock

            - description: aggre PCIE_6 WEST AXI clock



  - if:

      properties:

        compatible:
@@ -131,10 +216,11 @@ allOf: 
        compatible:

          contains:

            enum:

              - qcom,glymur-pcie-west-anoc

              - qcom,glymur-pcie-east-anoc

              - qcom,glymur-aggre2-noc

              - qcom,glymur-aggre4-noc

              - qcom,glymur-pcie-east-anoc

              - qcom,glymur-pcie-west-anoc

              - qcom,mahua-pcie-west-anoc

    then:

      required:

        - clocks