Commit 43e18b0a authored by Matt Roper's avatar Matt Roper Committed by Lucas De Marchi
Browse files

drm/i915/xe2lpd: Add DC state support 



Xe2_LPD supports DC5, DC6, and DC9 (DC3CO no longer exists).  The
overall programming and requirements to enter DC states are similar to
those of Xe_LPD+ although AUX transactions do not require DC5/DC6 exit
as they did previously.

Bspec: 68851, 68857, 68886, 69115
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarAnusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230919192128.2045154-21-lucas.demarchi@intel.com
parent c2d9d8e7

drivers/gpu/drm/i915/display/intel_display_power.c

+3 −1
Original line number Diff line number Diff line
@@ -943,7 +943,9 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv, 
	if (!HAS_DISPLAY(dev_priv))

		return 0;



	if (IS_DG2(dev_priv))

	if (DISPLAY_VER(dev_priv) >= 20)

		max_dc = 2;

	else if (IS_DG2(dev_priv))

		max_dc = 1;

	else if (IS_DG1(dev_priv))

		max_dc = 3;

drivers/gpu/drm/i915/display/intel_display_power_map.c

+18 −0
Original line number Diff line number Diff line
@@ -1561,9 +1561,27 @@ static const struct i915_power_well_desc xe2lpd_power_wells_pica[] = { 
	},

};



I915_DECL_PW_DOMAINS(xe2lpd_pwdoms_dc_off,

	POWER_DOMAIN_DC_OFF,

	XELPD_PW_C_POWER_DOMAINS,

	XELPD_PW_D_POWER_DOMAINS,

	POWER_DOMAIN_AUDIO_MMIO,

	POWER_DOMAIN_INIT);



static const struct i915_power_well_desc xe2lpd_power_wells_dcoff[] = {

	{

		.instances = &I915_PW_INSTANCES(

			I915_PW("DC_off", &xe2lpd_pwdoms_dc_off,

				.id = SKL_DISP_DC_OFF),

		),

		.ops = &gen9_dc_off_power_well_ops,

	},

};



static const struct i915_power_well_desc_list xe2lpd_power_wells[] = {

	I915_PW_DESCRIPTORS(i9xx_power_wells_always_on),

	I915_PW_DESCRIPTORS(icl_power_wells_pw_1),

	I915_PW_DESCRIPTORS(xe2lpd_power_wells_dcoff),

	I915_PW_DESCRIPTORS(xelpdp_power_wells_main),

	I915_PW_DESCRIPTORS(xe2lpd_power_wells_pica),

};