Commit 43e5fee3 authored by Derong Liu's avatar Derong Liu Committed by Ulf Hansson
Browse files

mmc: mtk-sd: Add wait dma stop done flow 



We found this issue on a 5G platform, during CMDQ error handling, if DMA
status is active when it call msdc_reset_hw(), it means mmc host hw reset
and DMA transfer will be parallel, mmc host may access sram region
unexpectedly. According to the programming guide of mtk-sd host, it needs
to wait for dma stop done after set dma stop.

This change should be applied to all SoCs.

Signed-off-by: default avatarDerong Liu <derong.liu@mediatek.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20210827071537.1034-1-derong.liu@mediatek.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 38929d4f

drivers/mmc/host/mtk-sd.c

+5 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include <linux/clk.h>

#include <linux/delay.h>

#include <linux/dma-mapping.h>

#include <linux/iopoll.h>

#include <linux/ioport.h>

#include <linux/irq.h>

#include <linux/of_address.h>
@@ -2330,6 +2331,7 @@ static void msdc_cqe_enable(struct mmc_host *mmc) 
static void msdc_cqe_disable(struct mmc_host *mmc, bool recovery)

{

	struct msdc_host *host = mmc_priv(mmc);

	unsigned int val = 0;



	/* disable cmdq irq */

	sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INT_CMDQ);
@@ -2339,6 +2341,9 @@ static void msdc_cqe_disable(struct mmc_host *mmc, bool recovery) 
	if (recovery) {

		sdr_set_field(host->base + MSDC_DMA_CTRL,

			      MSDC_DMA_CTRL_STOP, 1);

		if (WARN_ON(readl_poll_timeout(host->base + MSDC_DMA_CFG, val,

			!(val & MSDC_DMA_CFG_STS), 1, 3000)))

			return;

		msdc_reset_hw(host);

	}

}