Commit 44059382 authored by Matt Roper's avatar Matt Roper
Browse files

drm/xe/pvc: Drop pre-prod workarounds 



Production PVC hardware had a graphics stepping of C0.  Xe1 platforms
already aren't officially supported by the Xe driver, but pre-production
steppings are especially out of scope (and 'has_pre_prod_wa' is not set
in the device descriptor).  Drop the workarounds that aren't relevant to
production hardware.

v2:
 - Drop the stream->override_gucrc which is no longer set anywhere after
   the removal of Wa_1509372804.  (Bala)
 - Drop xe_guc_rc_set_mode / xe_guc_rc_unset_mode which are no longer
   used after the removal of Wa_1509372804.

Bspec: 44484
Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: default avatarBalasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Link: https://patch.msgid.link/20260220-forupstream-wa_cleanup-v2-2-b12005a05af6@intel.com


Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
parent ad41e941

drivers/gpu/drm/xe/xe_guc.c

+0 −3
Original line number Diff line number Diff line
@@ -213,9 +213,6 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc) 
	    !xe_hw_engine_mask_per_class(gt, XE_ENGINE_CLASS_RENDER))

		flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST;



	if (XE_GT_WA(gt, 1509372804))

		flags |= GUC_WA_RENDER_RST_RC6_EXIT;



	if (XE_GT_WA(gt, 14018913170))

		flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;

drivers/gpu/drm/xe/xe_guc_rc.c

+0 −29
Original line number Diff line number Diff line
@@ -129,32 +129,3 @@ int xe_guc_rc_enable(struct xe_guc *guc) 


	return guc_action_setup_gucrc(guc, GUCRC_FIRMWARE_CONTROL);

}
 


/**

 * xe_guc_rc_set_mode() - set new GUCRC mode

 * @guc: Xe GuC instance

 * @mode: new value of the mode.

 *

 * Function to set GuC RC mode to one of the enum values.

 *

 * Returns: 0 on success, negative error code on error

 */

int xe_guc_rc_set_mode(struct xe_guc *guc, enum slpc_gucrc_mode mode)

{

	guard(xe_pm_runtime_noresume)(guc_to_xe(guc));

	return xe_guc_pc_action_set_param(&guc->pc, SLPC_PARAM_PWRGATE_RC_MODE, mode);

}



/**

 * xe_guc_rc_unset_mode() - revert to default mode

 * @guc: Xe GuC instance

 *

 * Function to revert GuC RC mode to platform defaults.

 *

 * Returns: 0 on success, negative error code on error

 */

int xe_guc_rc_unset_mode(struct xe_guc *guc)

{

	guard(xe_pm_runtime_noresume)(guc_to_xe(guc));

	return xe_guc_pc_action_unset_param(&guc->pc, SLPC_PARAM_PWRGATE_RC_MODE);

}

drivers/gpu/drm/xe/xe_guc_rc.h

+0 −2
Original line number Diff line number Diff line
@@ -12,7 +12,5 @@ enum slpc_gucrc_mode; 
int xe_guc_rc_init(struct xe_guc *guc);

int xe_guc_rc_enable(struct xe_guc *guc);

void xe_guc_rc_disable(struct xe_guc *guc);

int xe_guc_rc_set_mode(struct xe_guc *guc, enum slpc_gucrc_mode mode);

int xe_guc_rc_unset_mode(struct xe_guc *guc);



#endif

drivers/gpu/drm/xe/xe_oa.c

+0 −19
Original line number Diff line number Diff line
@@ -873,10 +873,6 @@ static void xe_oa_stream_destroy(struct xe_oa_stream *stream) 
	xe_force_wake_put(gt_to_fw(gt), stream->fw_ref);

	xe_pm_runtime_put(stream->oa->xe);



	/* Wa_1509372804:pvc: Unset the override of GUCRC mode to enable rc6 */

	if (stream->override_gucrc)

		xe_gt_WARN_ON(gt, xe_guc_rc_unset_mode(&gt->uc.guc));



	xe_oa_free_configs(stream);

	xe_file_put(stream->xef);

}
@@ -1760,18 +1756,6 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream, 
		goto exit;

	}



	/*

	 * GuC reset of engines causes OA to lose configuration

	 * state. Prevent this by overriding GUCRC mode.

	 */

	if (XE_GT_WA(stream->gt, 1509372804)) {

		ret = xe_guc_rc_set_mode(&gt->uc.guc, SLPC_GUCRC_MODE_GUCRC_NO_RC6);

		if (ret)

			goto err_free_configs;



		stream->override_gucrc = true;

	}



	/* Take runtime pm ref and forcewake to disable RC6 */

	xe_pm_runtime_get(stream->oa->xe);

	stream->fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
@@ -1822,9 +1806,6 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream, 
err_fw_put:

	xe_force_wake_put(gt_to_fw(gt), stream->fw_ref);

	xe_pm_runtime_put(stream->oa->xe);

	if (stream->override_gucrc)

		xe_gt_WARN_ON(gt, xe_guc_rc_unset_mode(&gt->uc.guc));

err_free_configs:

	xe_oa_free_configs(stream);

exit:

	xe_file_put(stream->xef);

drivers/gpu/drm/xe/xe_oa_types.h

+0 −3
Original line number Diff line number Diff line
@@ -239,9 +239,6 @@ struct xe_oa_stream { 
	/** @poll_period_ns: hrtimer period for checking OA buffer for available data */

	u64 poll_period_ns;



	/** @override_gucrc: GuC RC has been overridden for the OA stream */

	bool override_gucrc;



	/** @oa_status: temporary storage for oa_status register value */

	u32 oa_status;