Commit 445a25f6 authored by Rahul Rameshbabu's avatar Rahul Rameshbabu Committed by Jakub Kicinski
Browse files

net/mlx5e: Support updating coalescing configuration without resetting channels 



When CQE mode or DIM state is changed, gracefully reconfigure channels to
handle new configuration. Previously, would create new channels that would
reflect the changes rather than update the original channels.

Co-developed-by: default avatarNabil S. Alramli <dev@nalramli.com>
Signed-off-by: default avatarNabil S. Alramli <dev@nalramli.com>
Co-developed-by: default avatarJoe Damato <jdamato@fastly.com>
Signed-off-by: default avatarJoe Damato <jdamato@fastly.com>
Signed-off-by: default avatarRahul Rameshbabu <rrameshbabu@nvidia.com>
Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Link: https://lore.kernel.org/r/20240419080445.417574-5-tariqt@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent a5e89a3f

drivers/net/ethernet/mellanox/mlx5/core/en.h

+20 −0
Original line number Diff line number Diff line
@@ -320,6 +320,8 @@ struct mlx5e_params { 
	bool scatter_fcs_en;

	bool rx_dim_enabled;

	bool tx_dim_enabled;

	bool rx_moder_use_cqe_mode;

	bool tx_moder_use_cqe_mode;

	u32 pflags;

	struct bpf_prog *xdp_prog;

	struct mlx5e_xsk *xsk;
@@ -797,6 +799,10 @@ struct mlx5e_channel { 
	int                        cpu;

	/* Sync between icosq recovery and XSK enable/disable. */

	struct mutex               icosq_recovery_lock;



	/* coalescing configuration */

	struct dim_cq_moder        rx_cq_moder;

	struct dim_cq_moder        tx_cq_moder;

};



struct mlx5e_ptp;
@@ -1040,6 +1046,11 @@ void mlx5e_close_rq(struct mlx5e_rq *rq); 
int mlx5e_create_rq(struct mlx5e_rq *rq, struct mlx5e_rq_param *param, u16 q_counter);

void mlx5e_destroy_rq(struct mlx5e_rq *rq);



bool mlx5e_reset_rx_moderation(struct dim_cq_moder *cq_moder, u8 cq_period_mode,

			       bool dim_enabled);

bool mlx5e_reset_rx_channels_moderation(struct mlx5e_channels *chs, u8 cq_period_mode,

					bool dim_enabled, bool keep_dim_state);



struct mlx5e_sq_param;

int mlx5e_open_xdpsq(struct mlx5e_channel *c, struct mlx5e_params *params,

		     struct mlx5e_sq_param *param, struct xsk_buff_pool *xsk_pool,
@@ -1060,6 +1071,10 @@ int mlx5e_open_cq(struct mlx5_core_dev *mdev, struct dim_cq_moder moder, 
		  struct mlx5e_cq_param *param, struct mlx5e_create_cq_param *ccp,

		  struct mlx5e_cq *cq);

void mlx5e_close_cq(struct mlx5e_cq *cq);

int mlx5e_modify_cq_period_mode(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,

				u8 cq_period_mode);

int mlx5e_modify_cq_moderation(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,

			       u16 cq_period, u16 cq_max_count, u8 cq_period_mode);



int mlx5e_open_locked(struct net_device *netdev);

int mlx5e_close_locked(struct net_device *netdev);
@@ -1118,6 +1133,11 @@ int mlx5e_create_sq_rdy(struct mlx5_core_dev *mdev, 
void mlx5e_tx_err_cqe_work(struct work_struct *recover_work);

void mlx5e_close_txqsq(struct mlx5e_txqsq *sq);



bool mlx5e_reset_tx_moderation(struct dim_cq_moder *cq_moder, u8 cq_period_mode,

			       bool dim_enabled);

bool mlx5e_reset_tx_channels_moderation(struct mlx5e_channels *chs, u8 cq_period_mode,

					bool dim_enabled, bool keep_dim_state);



static inline bool mlx5_tx_swp_supported(struct mlx5_core_dev *mdev)

{

	return MLX5_CAP_ETH(mdev, swp) &&

drivers/net/ethernet/mellanox/mlx5/core/en/channels.c

+83 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 


#include "channels.h"

#include "en.h"

#include "en/dim.h"

#include "en/ptp.h"



unsigned int mlx5e_channels_get_num(struct mlx5e_channels *chs)
@@ -55,3 +56,85 @@ bool mlx5e_channels_get_ptp_rqn(struct mlx5e_channels *chs, u32 *rqn) 
	*rqn = c->rq.rqn;

	return true;

}



int mlx5e_channels_rx_change_dim(struct mlx5e_channels *chs, bool enable)

{

	int i;



	for (i = 0; i < chs->num; i++) {

		int err = mlx5e_dim_rx_change(&chs->c[i]->rq, enable);



		if (err)

			return err;

	}



	return 0;

}



int mlx5e_channels_tx_change_dim(struct mlx5e_channels *chs, bool enable)

{

	int i, tc;



	for (i = 0; i < chs->num; i++) {

		for (tc = 0; tc < mlx5e_get_dcb_num_tc(&chs->params); tc++) {

			int err = mlx5e_dim_tx_change(&chs->c[i]->sq[tc], enable);



			if (err)

				return err;

		}

	}



	return 0;

}



int mlx5e_channels_rx_toggle_dim(struct mlx5e_channels *chs)

{

	int i;



	for (i = 0; i < chs->num; i++) {

		/* If dim is enabled for the channel, reset the dim state so the

		 * collected statistics will be reset. This is useful for

		 * supporting legacy interfaces that allow things like changing

		 * the CQ period mode for all channels without disturbing

		 * individual channel configurations.

		 */

		if (chs->c[i]->rq.dim) {

			int err;



			mlx5e_dim_rx_change(&chs->c[i]->rq, false);

			err = mlx5e_dim_rx_change(&chs->c[i]->rq, true);

			if (err)

				return err;

		}

	}



	return 0;

}



int mlx5e_channels_tx_toggle_dim(struct mlx5e_channels *chs)

{

	int i, tc;



	for (i = 0; i < chs->num; i++) {

		for (tc = 0; tc < mlx5e_get_dcb_num_tc(&chs->params); tc++) {

			int err;



			/* If dim is enabled for the channel, reset the dim

			 * state so the collected statistics will be reset. This

			 * is useful for supporting legacy interfaces that allow

			 * things like changing the CQ period mode for all

			 * channels without disturbing individual channel

			 * configurations.

			 */

			if (!chs->c[i]->sq[tc].dim)

				continue;



			mlx5e_dim_tx_change(&chs->c[i]->sq[tc], false);

			err = mlx5e_dim_tx_change(&chs->c[i]->sq[tc], true);

			if (err)

				return err;

		}

	}



	return 0;

}

drivers/net/ethernet/mellanox/mlx5/core/en/channels.h

+4 −0
Original line number Diff line number Diff line
@@ -15,5 +15,9 @@ void mlx5e_channels_get_regular_rqn(struct mlx5e_channels *chs, unsigned int ix, 
void mlx5e_channels_get_xsk_rqn(struct mlx5e_channels *chs, unsigned int ix, u32 *rqn,

				u32 *vhca_id);

bool mlx5e_channels_get_ptp_rqn(struct mlx5e_channels *chs, u32 *rqn);

int mlx5e_channels_rx_change_dim(struct mlx5e_channels *chs, bool enabled);

int mlx5e_channels_tx_change_dim(struct mlx5e_channels *chs, bool enabled);

int mlx5e_channels_rx_toggle_dim(struct mlx5e_channels *chs);

int mlx5e_channels_tx_toggle_dim(struct mlx5e_channels *chs);



#endif /* __MLX5_EN_CHANNELS_H__ */

drivers/net/ethernet/mellanox/mlx5/core/en/dim.h

+4 −0
Original line number Diff line number Diff line
@@ -9,6 +9,8 @@ 
#include <linux/mlx5/mlx5_ifc.h>



/* Forward declarations */

struct mlx5e_rq;

struct mlx5e_txqsq;

struct work_struct;



/* convert a boolean value for cqe mode to appropriate dim constant
@@ -37,5 +39,7 @@ mlx5e_cq_period_mode(enum dim_cq_period_mode cq_period_mode) 


void mlx5e_rx_dim_work(struct work_struct *work);

void mlx5e_tx_dim_work(struct work_struct *work);

int mlx5e_dim_rx_change(struct mlx5e_rq *rq, bool enabled);

int mlx5e_dim_tx_change(struct mlx5e_txqsq *sq, bool enabled);



#endif /* __MLX5_EN_DIM_H__ */

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

+0 −58
Original line number Diff line number Diff line
@@ -514,64 +514,6 @@ int mlx5e_validate_params(struct mlx5_core_dev *mdev, struct mlx5e_params *param 
	return 0;

}



static struct dim_cq_moder mlx5e_get_def_tx_moderation(u8 cq_period_mode)

{

	struct dim_cq_moder moder = {};



	moder.cq_period_mode = cq_period_mode;

	moder.pkts = MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_PKTS;

	moder.usec = MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_USEC;

	if (cq_period_mode == DIM_CQ_PERIOD_MODE_START_FROM_CQE)

		moder.usec = MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_USEC_FROM_CQE;



	return moder;

}



static struct dim_cq_moder mlx5e_get_def_rx_moderation(u8 cq_period_mode)

{

	struct dim_cq_moder moder = {};



	moder.cq_period_mode = cq_period_mode;

	moder.pkts = MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_PKTS;

	moder.usec = MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC;

	if (cq_period_mode == DIM_CQ_PERIOD_MODE_START_FROM_CQE)

		moder.usec = MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC_FROM_CQE;



	return moder;

}



void mlx5e_reset_tx_moderation(struct mlx5e_params *params, u8 cq_period_mode)

{

	if (params->tx_dim_enabled)

		params->tx_cq_moderation = net_dim_get_def_tx_moderation(cq_period_mode);

	else

		params->tx_cq_moderation = mlx5e_get_def_tx_moderation(cq_period_mode);

}



void mlx5e_reset_rx_moderation(struct mlx5e_params *params, u8 cq_period_mode)

{

	if (params->rx_dim_enabled)

		params->rx_cq_moderation = net_dim_get_def_rx_moderation(cq_period_mode);

	else

		params->rx_cq_moderation = mlx5e_get_def_rx_moderation(cq_period_mode);

}



void mlx5e_set_tx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)

{

	mlx5e_reset_tx_moderation(params, cq_period_mode);

	MLX5E_SET_PFLAG(params, MLX5E_PFLAG_TX_CQE_BASED_MODER,

			params->tx_cq_moderation.cq_period_mode ==

				DIM_CQ_PERIOD_MODE_START_FROM_CQE);

}



void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)

{

	mlx5e_reset_rx_moderation(params, cq_period_mode);

	MLX5E_SET_PFLAG(params, MLX5E_PFLAG_RX_CQE_BASED_MODER,

			params->rx_cq_moderation.cq_period_mode ==

				DIM_CQ_PERIOD_MODE_START_FROM_CQE);

}



bool slow_pci_heuristic(struct mlx5_core_dev *mdev)

{

	u32 link_speed = 0;