Commit 44abca1f authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'net-stmmac-prevent-div-by-0' 

Alexis Lothoré says:

====================
net: stmmac: prevent div by 0

fix a small splat I am observing on a STM32MP157 platform at boot
(see commit 1) due to a division by 0.

v3: https://lore.kernel.org/20250528-stmmac_tstamp_div-v3-0-b525ecdfd84c@bootlin.com
v2: https://lore.kernel.org/20250527-stmmac_tstamp_div-v2-1-663251b3b542@bootlin.com
v1: https://lore.kernel.org/20250523-stmmac_tstamp_div-v1-1-bca8a5a3a477@bootlin.com
====================

Link: https://patch.msgid.link/20250529-stmmac_tstamp_div-v4-0-d73340a794d5@bootlin.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 3ec52330 cbefe2ff

drivers/net/ethernet/stmicro/stmmac/stmmac_est.c

+5 −0
Original line number Diff line number Diff line
@@ -32,6 +32,11 @@ static int est_configure(struct stmmac_priv *priv, struct stmmac_est *cfg, 
	int i, ret = 0;

	u32 ctrl;



	if (!ptp_rate) {

		netdev_warn(priv->dev, "Invalid PTP rate");

		return -EINVAL;

	}



	ret |= est_write(est_addr, EST_BTR_LOW, cfg->btr[0], false);

	ret |= est_write(est_addr, EST_BTR_HIGH, cfg->btr[1], false);

	ret |= est_write(est_addr, EST_TER, cfg->ter, false);

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

+5 −0
Original line number Diff line number Diff line
@@ -805,6 +805,11 @@ int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags) 
	if (!(priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp))

		return -EOPNOTSUPP;



	if (!priv->plat->clk_ptp_rate) {

		netdev_err(priv->dev, "Invalid PTP clock rate");

		return -EINVAL;

	}



	stmmac_config_hw_tstamping(priv, priv->ptpaddr, systime_flags);

	priv->systime_flags = systime_flags;

drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c

+1 −1
Original line number Diff line number Diff line
@@ -317,7 +317,7 @@ void stmmac_ptp_register(struct stmmac_priv *priv) 


	/* Calculate the clock domain crossing (CDC) error if necessary */

	priv->plat->cdc_error_adj = 0;

	if (priv->plat->has_gmac4 && priv->plat->clk_ptp_rate)

	if (priv->plat->has_gmac4)

		priv->plat->cdc_error_adj = (2 * NSEC_PER_SEC) / priv->plat->clk_ptp_rate;



	/* Update the ptp clock parameters based on feature discovery, when