Commit 44d10c27 authored by Mark Brown's avatar Mark Brown Committed by Catalin Marinas
Browse files

kselftest/arm64: Add 2023 DPISA hwcap test coverage



Add the hwcaps added for the 2023 DPISA extensions to the hwcaps test
program.

Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20240306-arm64-2023-dpisa-v5-9-c568edc8ed7f@kernel.org


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 7bcebadd
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+217 −0
Original line number Diff line number Diff line
@@ -58,11 +58,46 @@ static void cssc_sigill(void)
	asm volatile(".inst 0xdac01c00" : : : "x0");
}

static void f8cvt_sigill(void)
{
	/* FSCALE V0.4H, V0.4H, V0.4H */
	asm volatile(".inst 0x2ec03c00");
}

static void f8dp2_sigill(void)
{
	/* FDOT V0.4H, V0.4H, V0.5H */
	asm volatile(".inst 0xe40fc00");
}

static void f8dp4_sigill(void)
{
	/* FDOT V0.2S, V0.2S, V0.2S */
	asm volatile(".inst 0xe00fc00");
}

static void f8fma_sigill(void)
{
	/* FMLALB V0.8H, V0.16B, V0.16B */
	asm volatile(".inst 0xec0fc00");
}

static void faminmax_sigill(void)
{
	/* FAMIN V0.4H, V0.4H, V0.4H */
	asm volatile(".inst 0x2ec01c00");
}

static void fp_sigill(void)
{
	asm volatile("fmov s0, #1");
}

static void fpmr_sigill(void)
{
	asm volatile("mrs x0, S3_3_C4_C4_2" : : : "x0");
}

static void ilrcpc_sigill(void)
{
	/* LDAPUR W0, [SP, #8] */
@@ -95,6 +130,12 @@ static void lse128_sigill(void)
		     : "cc", "memory");
}

static void lut_sigill(void)
{
	/* LUTI2 V0.16B, { V0.16B }, V[0] */
	asm volatile(".inst 0x4e801000");
}

static void mops_sigill(void)
{
	char dst[1], src[1];
@@ -216,6 +257,78 @@ static void smef16f16_sigill(void)
	asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
}

static void smef8f16_sigill(void)
{
	/* SMSTART */
	asm volatile("msr S0_3_C4_C7_3, xzr" : : : );

	/* FDOT ZA.H[W0, 0], Z0.B-Z1.B, Z0.B-Z1.B */
	asm volatile(".inst 0xc1a01020" : : : );

	/* SMSTOP */
	asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
}

static void smef8f32_sigill(void)
{
	/* SMSTART */
	asm volatile("msr S0_3_C4_C7_3, xzr" : : : );

	/* FDOT ZA.S[W0, 0], { Z0.B-Z1.B }, Z0.B[0] */
	asm volatile(".inst 0xc1500038" : : : );

	/* SMSTOP */
	asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
}

static void smelutv2_sigill(void)
{
	/* SMSTART */
	asm volatile("msr S0_3_C4_C7_3, xzr" : : : );

	/* LUTI4 { Z0.B-Z3.B }, ZT0, { Z0-Z1 } */
	asm volatile(".inst 0xc08b0000" : : : );

	/* SMSTOP */
	asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
}

static void smesf8dp2_sigill(void)
{
	/* SMSTART */
	asm volatile("msr S0_3_C4_C7_3, xzr" : : : );

	/* FDOT Z0.H, Z0.B, Z0.B[0] */
	asm volatile(".inst 0x64204400" : : : );

	/* SMSTOP */
	asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
}

static void smesf8dp4_sigill(void)
{
	/* SMSTART */
	asm volatile("msr S0_3_C4_C7_3, xzr" : : : );

	/* FDOT Z0.S, Z0.B, Z0.B[0] */
	asm volatile(".inst 0xc1a41C00" : : : );

	/* SMSTOP */
	asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
}

static void smesf8fma_sigill(void)
{
	/* SMSTART */
	asm volatile("msr S0_3_C4_C7_3, xzr" : : : );

	/* FMLALB V0.8H, V0.16B, V0.16B */
	asm volatile(".inst 0xec0fc00");

	/* SMSTOP */
	asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
}

static void sve_sigill(void)
{
	/* RDVL x0, #0 */
@@ -353,6 +466,53 @@ static const struct hwcap_data {
		.cpuinfo = "cssc",
		.sigill_fn = cssc_sigill,
	},
	{
		.name = "F8CVT",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_F8CVT,
		.cpuinfo = "f8cvt",
		.sigill_fn = f8cvt_sigill,
	},
	{
		.name = "F8DP4",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_F8DP4,
		.cpuinfo = "f8dp4",
		.sigill_fn = f8dp4_sigill,
	},
	{
		.name = "F8DP2",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_F8DP2,
		.cpuinfo = "f8dp4",
		.sigill_fn = f8dp2_sigill,
	},
	{
		.name = "F8E5M2",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_F8E5M2,
		.cpuinfo = "f8e5m2",
	},
	{
		.name = "F8E4M3",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_F8E4M3,
		.cpuinfo = "f8e4m3",
	},
	{
		.name = "F8FMA",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_F8FMA,
		.cpuinfo = "f8fma",
		.sigill_fn = f8fma_sigill,
	},
	{
		.name = "FAMINMAX",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_FAMINMAX,
		.cpuinfo = "faminmax",
		.sigill_fn = faminmax_sigill,
	},
	{
		.name = "FP",
		.at_hwcap = AT_HWCAP,
@@ -360,6 +520,14 @@ static const struct hwcap_data {
		.cpuinfo = "fp",
		.sigill_fn = fp_sigill,
	},
	{
		.name = "FPMR",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_FPMR,
		.cpuinfo = "fpmr",
		.sigill_fn = fpmr_sigill,
		.sigill_reliable = true,
	},
	{
		.name = "JSCVT",
		.at_hwcap = AT_HWCAP,
@@ -411,6 +579,13 @@ static const struct hwcap_data {
		.cpuinfo = "lse128",
		.sigill_fn = lse128_sigill,
	},
	{
		.name = "LUT",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_LUT,
		.cpuinfo = "lut",
		.sigill_fn = lut_sigill,
	},
	{
		.name = "MOPS",
		.at_hwcap = AT_HWCAP2,
@@ -511,6 +686,48 @@ static const struct hwcap_data {
		.cpuinfo = "smef16f16",
		.sigill_fn = smef16f16_sigill,
	},
	{
		.name = "SME F8F16",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_SME_F8F16,
		.cpuinfo = "smef8f16",
		.sigill_fn = smef8f16_sigill,
	},
	{
		.name = "SME F8F32",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_SME_F8F32,
		.cpuinfo = "smef8f32",
		.sigill_fn = smef8f32_sigill,
	},
	{
		.name = "SME LUTV2",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_SME_LUTV2,
		.cpuinfo = "smelutv2",
		.sigill_fn = smelutv2_sigill,
	},
	{
		.name = "SME SF8FMA",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_SME_SF8FMA,
		.cpuinfo = "smesf8fma",
		.sigill_fn = smesf8fma_sigill,
	},
	{
		.name = "SME SF8DP2",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_SME_SF8DP2,
		.cpuinfo = "smesf8dp2",
		.sigill_fn = smesf8dp2_sigill,
	},
	{
		.name = "SME SF8DP4",
		.at_hwcap = AT_HWCAP2,
		.hwcap_bit = HWCAP2_SME_SF8DP4,
		.cpuinfo = "smesf8dp4",
		.sigill_fn = smesf8dp4_sigill,
	},
	{
		.name = "SVE",
		.at_hwcap = AT_HWCAP,