Commit 45215c58 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-misc-next-2025-06-12' of... 

Merge tag 'drm-misc-next-2025-06-12' of https://gitlab.freedesktop.org/drm/misc/kernel

 into drm-next

drm-misc-next for 6.17:

UAPI Changes:

Cross-subsystem Changes:

Core Changes:
 - atomic-helpers: Tune the enable / disable sequence
 - bridge: Add destroy hook
 - color management: Add helpers for hardware gamma LUT handling
 - HDMI: Add CEC handling, YUV420 output support
 - sched: tracing improvements

Driver Changes:
 - hyperv: Move out of simple-kms, drm_panic support
 - i915: drm_panel_follower support
 - imx: Add IMX8qxq Display Controller Support
 - lima: Add Rockchip RK3528 GPU Support
 - nouveau: fence handling cleanup
 - panfrost: Add BO labeling, 64-bit registers access
 - qaic: Add RAS Support
 - rz-du: Add RZ/V2H(P) Support, MIPI-DSI DCS Support
 - sun4i: Add H616 Support
 - tidss: Add TI AM62L Support
 - vkms: YUV and R* formats support

 - bridges:
   - Switched to reference counted drm_bridge allocations

 - panels:
   - Switched to reference counted drm_panel allocations
   - Add support for fwnode-based panel lookup
   - himax-hx8394: Support for Huiling hl055fhv028c
   - ilitek-ili9881c: Support for 7" Raspberry Pi 720x1280
   - panel-edp: Support for KDC KD116N3730A05, N160JCE-ELL CMN,
   - panel-simple: Support for AUO P238HAN01
   - st7701: Support for Winstar wf40eswaa6mnn0
   - visionox-rm69299: Support for rm69299-shift
   - New panels: Renesas R61307, Renesas R69328

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Maxime Ripard <mripard@redhat.com>
Link: https://lore.kernel.org/r/20250612-coucal-of-impossible-cleaning-a5eecf@houat
parents e04c78d8 c5b4393c

Documentation/ABI/testing/sysfs-driver-qaic

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What:		/sys/bus/pci/drivers/qaic/XXXX:XX:XX.X/ce_count

Date:		May 2025

KernelVersion:	6.17

Contact:	dri-devel@lists.freedesktop.org

Description:	Number of correctable errors received from device since driver is loaded.



What:		/sys/bus/pci/drivers/qaic/XXXX:XX:XX.X/ue_count

Date:		May 2025

KernelVersion:	6.17

Contact:	dri-devel@lists.freedesktop.org

Description:	Number of uncorrectable errors received from device since driver is loaded.



What:		/sys/bus/pci/drivers/qaic/XXXX:XX:XX.X/ue_nonfatal_count

Date:		May 2025

KernelVersion:	6.17

Contact:	dri-devel@lists.freedesktop.org

Description:	Number of uncorrectable non-fatal errors received from device since driver

		is loaded.

Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml

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@@ -24,9 +24,11 @@ properties: 
      - allwinner,sun50i-a64-de2-mixer-0

      - allwinner,sun50i-a64-de2-mixer-1

      - allwinner,sun50i-h6-de3-mixer-0

      - allwinner,sun50i-h616-de33-mixer-0



  reg:

    maxItems: 1

  reg: true



  reg-names: true



  clocks:

    items:
@@ -61,6 +63,34 @@ properties: 
    required:

      - port@1



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - allwinner,sun50i-h616-de33-mixer-0

    then:

      properties:

        reg:

          description: |

            Registers for controlling individual layers of the display

            engine (layers), global control (top), and display blending

            control (display). Names are from Allwinner BSP kernel.

          maxItems: 3

        reg-names:

          items:

            - const: layers

            - const: top

            - const: display

      required:

        - reg-names



    else:

      properties:

        reg:

          maxItems: 1



required:

  - compatible

  - reg

Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale i.MX8qxp Display Controller AXI Performance Counter



description: |

  Performance counters are provided to allow measurement of average bandwidth

  and latency during operation. The following features are supported:



  * Manual and timer controlled measurement mode.



  * Measurement counters:

    - GLOBAL_COUNTER for overall measurement time

    - BUSY_COUNTER for number of data bus busy cycles

    - DATA_COUNTER for number of data transfer cycles

    - TRANSFER_COUNTER for number of transfers

    - ADDRBUSY_COUNTER for number of address bus busy cycles

    - LATENCY_COUNTER for average latency



  * Counter overflow detection.



  * Outstanding Transfer Counters (OTC) which are used for latency measurement

    have to run immediately after reset, but can be disabled by software when

    there is no need for latency measurement.



maintainers:

  - Liu Ying <victor.liu@nxp.com>



properties:

  compatible:

    const: fsl,imx8qxp-dc-axi-performance-counter



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



required:

  - compatible

  - reg

  - clocks



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/imx8-lpcg.h>



    pmu@5618f000 {

        compatible = "fsl,imx8qxp-dc-axi-performance-counter";

        reg = <0x5618f000 0x90>;

        clocks = <&dc0_lpcg IMX_LPCG_CLK_5>;

    };

Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-blit-engine.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale i.MX8qxp Display Controller Blit Engine



description: |

  A blit operation (block based image transfer) reads up to 3 source images

  from memory and computes one destination image from it, which is written

  back to memory. The following basic operations are supported:



  * Buffer Fill

    Fills a buffer with constant color



  * Buffer Copy

    Copies one source to a destination buffer.



  * Image Blend

    Combines two source images by a blending equation and writes result to

    destination (which can be one of the sources).



  * Image Rop2/3

    Combines up to three source images by a logical equation (raster operation)

    and writes result to destination (which can be one of the sources).



  * Image Flip

    Mirrors the source image in horizontal and/or vertical direction.



  * Format Convert

    Convert between the supported color and buffer formats.



  * Color Transform

    Modify colors by linear or non-linear transformations.



  * Image Scale

    Changes size of the source image.



  * Image Rotate

    Rotates the source image by any angle.



  * Image Filter

    Performs an FIR filter operation on the source image.



  * Image Warp

    Performs a re-sampling of the source image with any pattern. The sample

    point positions are read from a compressed coordinate buffer.



  * Buffer Pack

    Writes an image with color components stored in up to three different

    buffers (planar formats) into a single buffer (packed format).



  * Chroma Resample

    Converts between different YUV formats that differ in chroma sampling rate

    (4:4:4, 4:2:2, 4:2:0).



maintainers:

  - Liu Ying <victor.liu@nxp.com>



properties:

  compatible:

    const: fsl,imx8qxp-dc-blit-engine



  reg:

    maxItems: 2



  reg-names:

    items:

      - const: pec

      - const: cfg



  "#address-cells":

    const: 1



  "#size-cells":

    const: 1



  ranges: true



patternProperties:

  "^blitblend@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        const: fsl,imx8qxp-dc-blitblend



  "^clut@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        const: fsl,imx8qxp-dc-clut



  "^fetchdecode@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        const: fsl,imx8qxp-dc-fetchdecode



  "^fetcheco@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        const: fsl,imx8qxp-dc-fetcheco



  "^fetchwarp@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        const: fsl,imx8qxp-dc-fetchwarp



  "^filter@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        const: fsl,imx8qxp-dc-filter



  "^hscaler@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        const: fsl,imx8qxp-dc-hscaler



  "^matrix@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        const: fsl,imx8qxp-dc-matrix



  "^rop@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        const: fsl,imx8qxp-dc-rop



  "^store@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        const: fsl,imx8qxp-dc-store



  "^vscaler@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        const: fsl,imx8qxp-dc-vscaler



required:

  - compatible

  - reg

  - reg-names

  - "#address-cells"

  - "#size-cells"

  - ranges



additionalProperties: false



examples:

  - |

    blit-engine@56180820 {

        compatible = "fsl,imx8qxp-dc-blit-engine";

        reg = <0x56180820 0x13c>, <0x56181000 0x3400>;

        reg-names = "pec", "cfg";

        #address-cells = <1>;

        #size-cells = <1>;

        ranges;



        fetchdecode@56180820 {

            compatible = "fsl,imx8qxp-dc-fetchdecode";

            reg = <0x56180820 0x10>, <0x56181000 0x404>;

            reg-names = "pec", "cfg";

        };



        store@56180940 {

            compatible = "fsl,imx8qxp-dc-store";

            reg = <0x56180940 0x1c>, <0x56184000 0x5c>;

            reg-names = "pec", "cfg";

            interrupt-parent = <&dc0_intc>;

            interrupts = <0>, <1>, <2>;

            interrupt-names = "shdload", "framecomplete", "seqcomplete";

        };

    };

Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blitblend.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-blitblend.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale i.MX8qxp Display Controller Blit Blend Unit



description:

  Combines two input frames to a single output frame, all frames having the

  same dimension.



maintainers:

  - Liu Ying <victor.liu@nxp.com>



properties:

  compatible:

    const: fsl,imx8qxp-dc-blitblend



  reg:

    maxItems: 2



  reg-names:

    items:

      - const: pec

      - const: cfg



required:

  - compatible

  - reg

  - reg-names



additionalProperties: false



examples:

  - |

    blitblend@56180920 {

        compatible = "fsl,imx8qxp-dc-blitblend";

        reg = <0x56180920 0x10>, <0x56183c00 0x3c>;

        reg-names = "pec", "cfg";

    };