Commit 4543534c authored by Dong Yibo's avatar Dong Yibo Committed by Jakub Kicinski
Browse files

net: rnpgbe: Add basic mbx ops support



Add fundamental mailbox (MBX) communication operations between PF
(Physical Function) and firmware for n500/n210 chips

Signed-off-by: default avatarDong Yibo <dong100@mucse.com>
Reviewed-by: default avatarVadim Fedorenko <vadim.fedorenko@linux.dev>
Link: https://patch.msgid.link/20251101013849.120565-4-dong100@mucse.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 1b7f85f7
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+3 −1
Original line number Diff line number Diff line
@@ -5,4 +5,6 @@
#

obj-$(CONFIG_MGBE) += rnpgbe.o
rnpgbe-objs := rnpgbe_main.o
rnpgbe-objs := rnpgbe_main.o\
	       rnpgbe_chip.o\
	       rnpgbe_mbx.o
+17 −0
Original line number Diff line number Diff line
@@ -4,13 +4,28 @@
#ifndef _RNPGBE_H
#define _RNPGBE_H

#include <linux/types.h>

enum rnpgbe_boards {
	board_n500,
	board_n210
};

struct mucse_mbx_info {
	u32 timeout_us;
	u32 delay_us;
	u16 fw_req;
	u16 fw_ack;
	/* fw <--> pf mbx */
	u32 fwpf_shm_base;
	u32 pf2fw_mbx_ctrl;
	u32 fwpf_mbx_mask;
	u32 fwpf_ctrl_base;
};

struct mucse_hw {
	void __iomem *hw_addr;
	struct mucse_mbx_info mbx;
};

struct mucse {
@@ -19,6 +34,8 @@ struct mucse {
	struct mucse_hw hw;
};

int rnpgbe_init_hw(struct mucse_hw *hw, int board_type);

/* Device IDs */
#define PCI_VENDOR_ID_MUCSE               0x8848
#define RNPGBE_DEVICE_ID_N500_QUAD_PORT   0x8308
+70 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2020 - 2025 Mucse Corporation. */

#include <linux/errno.h>

#include "rnpgbe.h"
#include "rnpgbe_hw.h"
#include "rnpgbe_mbx.h"

/**
 * rnpgbe_init_n500 - Setup n500 hw info
 * @hw: hw information structure
 *
 * rnpgbe_init_n500 initializes all private
 * structure for n500
 **/
static void rnpgbe_init_n500(struct mucse_hw *hw)
{
	struct mucse_mbx_info *mbx = &hw->mbx;

	mbx->fwpf_ctrl_base = MUCSE_N500_FWPF_CTRL_BASE;
	mbx->fwpf_shm_base = MUCSE_N500_FWPF_SHM_BASE;
}

/**
 * rnpgbe_init_n210 - Setup n210 hw info
 * @hw: hw information structure
 *
 * rnpgbe_init_n210 initializes all private
 * structure for n210
 **/
static void rnpgbe_init_n210(struct mucse_hw *hw)
{
	struct mucse_mbx_info *mbx = &hw->mbx;

	mbx->fwpf_ctrl_base = MUCSE_N210_FWPF_CTRL_BASE;
	mbx->fwpf_shm_base = MUCSE_N210_FWPF_SHM_BASE;
}

/**
 * rnpgbe_init_hw - Setup hw info according to board_type
 * @hw: hw information structure
 * @board_type: board type
 *
 * rnpgbe_init_hw initializes all hw data
 *
 * Return: 0 on success, -EINVAL on failure
 **/
int rnpgbe_init_hw(struct mucse_hw *hw, int board_type)
{
	struct mucse_mbx_info *mbx = &hw->mbx;

	mbx->pf2fw_mbx_ctrl = MUCSE_GBE_PFFW_MBX_CTRL_OFFSET;
	mbx->fwpf_mbx_mask = MUCSE_GBE_FWPF_MBX_MASK_OFFSET;

	switch (board_type) {
	case board_n500:
		rnpgbe_init_n500(hw);
		break;
	case board_n210:
		rnpgbe_init_n210(hw);
		break;
	default:
		return -EINVAL;
	}
	/* init_params with mbx base */
	mucse_init_mbx_params_pf(hw);

	return 0;
}
+7 −0
Original line number Diff line number Diff line
@@ -4,5 +4,12 @@
#ifndef _RNPGBE_HW_H
#define _RNPGBE_HW_H

#define MUCSE_N500_FWPF_CTRL_BASE      0x28b00
#define MUCSE_N500_FWPF_SHM_BASE       0x2d000
#define MUCSE_GBE_PFFW_MBX_CTRL_OFFSET 0x5500
#define MUCSE_GBE_FWPF_MBX_MASK_OFFSET 0x5700
#define MUCSE_N210_FWPF_CTRL_BASE      0x29400
#define MUCSE_N210_FWPF_SHM_BASE       0x2d900

#define RNPGBE_MAX_QUEUES 8
#endif /* _RNPGBE_HW_H */
+5 −0
Original line number Diff line number Diff line
@@ -64,6 +64,11 @@ static int rnpgbe_add_adapter(struct pci_dev *pdev,
	}

	hw->hw_addr = hw_addr;
	err = rnpgbe_init_hw(hw, board_type);
	if (err) {
		dev_err(&pdev->dev, "Init hw err %d\n", err);
		goto err_free_net;
	}

	return 0;

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