Commit 45a29741 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Rob Clark
Browse files

drm/msm: Use the central UBWC config database 



As discussed a lot in the past, the UBWC config must be coherent across
a number of IP blocks (currently display and GPU, but it also may/will
concern camera/video as the drivers evolve).

So far, we've been trying to keep the values reasonable in each of the
two drivers separately, but it really make sense to do so centrally,
especially given certain fields (e.g. HBB) may need to be gathered
dynamically.

To reduce room for error, move to fetching the config from a central
source, so that the data programmed into the hardware is consistent
across all multimedia blocks that request it.

Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/660963/


Signed-off-by: default avatarRob Clark <robin.clark@oss.qualcomm.com>
parent 227d4ce0

drivers/gpu/drm/msm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ config DRM_MSM 
	select SHMEM

	select TMPFS

	select QCOM_SCM

	select QCOM_UBWC_CONFIG

	select WANT_DEV_COREDUMP

	select SND_SOC_HDMI_CODEC if SND_SOC

	select SYNC_FILE

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

+3 −3
Original line number Diff line number Diff line
@@ -10,11 +10,11 @@ 
#include "dpu_hw_sspp.h"

#include "dpu_kms.h"



#include "msm_mdss.h"



#include <drm/drm_file.h>

#include <drm/drm_managed.h>



#include <linux/soc/qcom/ubwc.h>



#define DPU_FETCH_CONFIG_RESET_VALUE   0x00000087



/* SSPP registers */
@@ -684,7 +684,7 @@ int _dpu_hw_sspp_init_debugfs(struct dpu_hw_sspp *hw_pipe, struct dpu_kms *kms, 
struct dpu_hw_sspp *dpu_hw_sspp_init(struct drm_device *dev,

				     const struct dpu_sspp_cfg *cfg,

				     void __iomem *addr,

				     const struct msm_mdss_data *mdss_data,

				     const struct qcom_ubwc_cfg_data *mdss_data,

				     const struct dpu_mdss_version *mdss_rev)

{

	struct dpu_hw_sspp *hw_pipe;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

+2 −2
Original line number Diff line number Diff line
@@ -308,7 +308,7 @@ struct dpu_hw_sspp_ops { 
struct dpu_hw_sspp {

	struct dpu_hw_blk base;

	struct dpu_hw_blk_reg_map hw;

	const struct msm_mdss_data *ubwc;

	const struct qcom_ubwc_cfg_data *ubwc;



	/* Pipe */

	enum dpu_sspp idx;
@@ -325,7 +325,7 @@ struct dpu_kms; 
struct dpu_hw_sspp *dpu_hw_sspp_init(struct drm_device *dev,

				     const struct dpu_sspp_cfg *cfg,

				     void __iomem *addr,

				     const struct msm_mdss_data *mdss_data,

				     const struct qcom_ubwc_cfg_data *mdss_data,

				     const struct dpu_mdss_version *mdss_rev);



int _dpu_hw_sspp_init_debugfs(struct dpu_hw_sspp *hw_pipe, struct dpu_kms *kms,

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

+4 −3
Original line number Diff line number Diff line
@@ -20,9 +20,10 @@ 
#include <drm/drm_vblank.h>

#include <drm/drm_writeback.h>



#include <linux/soc/qcom/ubwc.h>



#include "msm_drv.h"

#include "msm_mmu.h"

#include "msm_mdss.h"

#include "msm_gem.h"

#include "disp/msm_disp_snapshot.h"
@@ -1189,10 +1190,10 @@ static int dpu_kms_hw_init(struct msm_kms *kms) 
		goto err_pm_put;

	}



	dpu_kms->mdss = msm_mdss_get_mdss_data(dpu_kms->pdev->dev.parent);

	dpu_kms->mdss = qcom_ubwc_config_get_data();

	if (IS_ERR(dpu_kms->mdss)) {

		rc = PTR_ERR(dpu_kms->mdss);

		DPU_ERROR("failed to get MDSS data: %d\n", rc);

		DPU_ERROR("failed to get UBWC config data: %d\n", rc);

		goto err_pm_put;

	}

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h

+1 −1
Original line number Diff line number Diff line
@@ -60,7 +60,7 @@ struct dpu_kms { 
	struct msm_kms base;

	struct drm_device *dev;

	const struct dpu_mdss_cfg *catalog;

	const struct msm_mdss_data *mdss;

	const struct qcom_ubwc_cfg_data *mdss;



	/* io/register spaces: */

	void __iomem *mmio, *vbif[VBIF_MAX];