Commit 46142cc1 authored by Arunpravin Paneer Selvam's avatar Arunpravin Paneer Selvam Committed by Alex Deucher
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drm/amdgpu: Add DCC GFX12 flag to enable address alignment 



We require this flag AMDGPU_GEM_CREATE_GFX12_DCC or any other
kernel level GFX12 DCC flag to differentiate the DCC buffers and other
pinned display buffers(which has TTM_PL_FLAG_CONTIGUOUS enabled).

If we use the TTM_PL_FLAG_CONTIGUOUS flag for DCC buffers, we may over
allocate for all the pinned display buffers unnecessarily that leads to
memory allocation failure.

Signed-off-by: default avatarArunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 92549780

drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c

+2 −1
Original line number Diff line number Diff line
@@ -512,7 +512,8 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, 
		/* Allocate blocks in desired range */

		vres->flags |= DRM_BUDDY_RANGE_ALLOCATION;



	if (adev->gmc.gmc_funcs->get_dcc_alignment)

	if (bo->flags & AMDGPU_GEM_CREATE_GFX12_DCC &&

	    adev->gmc.gmc_funcs->get_dcc_alignment)

		adjust_dcc_size = amdgpu_gmc_get_dcc_alignment(adev);



	remaining_size = (u64)vres->base.size;