Commit 4723455e authored Oct 29, 2025 by Marek Vasut Committed by Tomi Valkeinen Oct 29, 2025

drm/rcar-du: dsi: Document TXVMSETR PIXWDTH as bitfield

The register TXVMSETR bitfield PIXWDTH is not a single bit, but a
bitfield. Add a MASK macro and document that the only allowed value
that can ever be written into the bitfield is the current value, 1.
No functional change.

Reviewed-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028232959.109936-3-marek.vasut+renesas@mailbox.org

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>

parent 42bbf82b

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

+2 −1

Original line number	Diff line number	Diff line
		@@ -143,7 +143,8 @@
		#define TXVMSETR_SYNSEQ_PULSES (0 << 16)
		#define TXVMSETR_SYNSEQ_EVENTS (1 << 16)
		#define TXVMSETR_VSTPM (1 << 15)
		#define TXVMSETR_PIXWDTH (1 << 8)
		#define TXVMSETR_PIXWDTH_MASK (7 << 8)
		#define TXVMSETR_PIXWDTH (1 << 8) /* Only allowed value */
		#define TXVMSETR_VSEN_EN (1 << 4)
		#define TXVMSETR_VSEN_DIS (0 << 4)
		#define TXVMSETR_HFPBPEN_EN (1 << 2)