Commit 474bf01e authored by Vasant Hegde's avatar Vasant Hegde Committed by Joerg Roedel
Browse files

iommu/amd: Add support for device based TLB invalidation 



Add support to invalidate TLB/IOTLB for the given device.

These functions will be used in subsequent patches where we will
introduce per device GCR3 table and SVA support.

Signed-off-by: default avatarVasant Hegde <vasant.hegde@amd.com>
Reviewed-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20240205115615.6053-8-vasant.hegde@amd.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 7b4e5623

drivers/iommu/amd/amd_iommu.h

+5 −0
Original line number Diff line number Diff line
@@ -55,6 +55,11 @@ void amd_iommu_domain_update(struct protection_domain *domain); 
void amd_iommu_domain_flush_complete(struct protection_domain *domain);

void amd_iommu_domain_flush_pages(struct protection_domain *domain,

				  u64 address, size_t size);

void amd_iommu_dev_flush_pasid_pages(struct iommu_dev_data *dev_data,

				     ioasid_t pasid, u64 address, size_t size);

void amd_iommu_dev_flush_pasid_all(struct iommu_dev_data *dev_data,

				   ioasid_t pasid);



int amd_iommu_flush_tlb(struct iommu_domain *dom, u32 pasid);

int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, u32 pasid,

			      unsigned long cr3);

drivers/iommu/amd/iommu.c

+23 −0
Original line number Diff line number Diff line
@@ -1538,6 +1538,29 @@ static void amd_iommu_domain_flush_all(struct protection_domain *domain) 
				     CMD_INV_IOMMU_ALL_PAGES_ADDRESS);

}



void amd_iommu_dev_flush_pasid_pages(struct iommu_dev_data *dev_data,

				     ioasid_t pasid, u64 address, size_t size)

{

	struct iommu_cmd cmd;

	struct amd_iommu *iommu = get_amd_iommu_from_dev(dev_data->dev);



	build_inv_iommu_pages(&cmd, address, size,

			      dev_data->domain->id, pasid, true);

	iommu_queue_command(iommu, &cmd);



	if (dev_data->ats_enabled)

		device_flush_iotlb(dev_data, address, size, pasid, true);



	iommu_completion_wait(iommu);

}



void amd_iommu_dev_flush_pasid_all(struct iommu_dev_data *dev_data,

				   ioasid_t pasid)

{

	amd_iommu_dev_flush_pasid_pages(dev_data, 0,

					CMD_INV_IOMMU_ALL_PAGES_ADDRESS, pasid);

}



void amd_iommu_domain_flush_complete(struct protection_domain *domain)

{

	int i;