Commit 4752cac3 authored by Yunxiang Li's avatar Yunxiang Li Committed by Alex Deucher
Browse files

drm/amdgpu: Move ras resume into SRIOV function 



This is part of the reset, move it into the reset function.

Signed-off-by: default avatarYunxiang Li <Yunxiang.Li@amd.com>
Reviewed-by: default avatarEmily Deng <Emily.Deng@amd.com>
Reviewed-by: default avatarZhigang Luo <zhigang.luo@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 97d814fe

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+5 −7
Original line number Diff line number Diff line
@@ -5123,6 +5123,11 @@ static int amdgpu_device_reset_sriov(struct amdgpu_device *adev, 
	amdgpu_amdkfd_post_reset(adev);

	amdgpu_virt_release_full_gpu(adev, true);



	/* Aldebaran and gfx_11_0_3 support ras in SRIOV, so need resume ras during reset */

	if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2) ||

	    amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) ||

	    amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 0, 3))

		amdgpu_ras_resume(adev);

	return 0;

}
@@ -5829,13 +5834,6 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev, 
		}

		if (r)

			adev->asic_reset_res = r;



		/* Aldebaran and gfx_11_0_3 support ras in SRIOV, so need resume ras during reset */

		if (amdgpu_ip_version(adev, GC_HWIP, 0) ==

			    IP_VERSION(9, 4, 2) ||

		    amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) ||

		    amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 0, 3))

			amdgpu_ras_resume(adev);

	} else {

		r = amdgpu_do_asic_reset(device_list_handle, reset_context);

		if (r && r == -EAGAIN)