Commit 47a5e9eb authored by Jessica Zhang's avatar Jessica Zhang Committed by Dmitry Baryshkov
Browse files

drm/msm/dpu: Drop maxwidth from dpu_lm_sub_blks struct 



Drop the unused maxwidth field from the dpu_lm_sub_blks struct

Signed-off-by: default avatarJessica Zhang <jessica.zhang@oss.qualcomm.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/653759/
Link: https://lore.kernel.org/r/20250514-max-mixer-width-v1-1-c8ba0d9bb858@oss.qualcomm.com


[DB: also handled SM8750 block]
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
parent 5ddcb0cb

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+0 −5
Original line number Diff line number Diff line
@@ -338,7 +338,6 @@ static const struct dpu_sspp_sub_blks dpu_dma_sblk = _DMA_SBLK(); 
 *************************************************************/



static const struct dpu_lm_sub_blks msm8998_lm_sblk = {

	.maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,

	.maxblendstages = 7, /* excluding base layer */

	.blendstage_base = { /* offsets relative to mixer base */

		0x20, 0x50, 0x80, 0xb0, 0x230,
@@ -347,7 +346,6 @@ static const struct dpu_lm_sub_blks msm8998_lm_sblk = { 
};



static const struct dpu_lm_sub_blks sdm845_lm_sblk = {

	.maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,

	.maxblendstages = 11, /* excluding base layer */

	.blendstage_base = { /* offsets relative to mixer base */

		0x20, 0x38, 0x50, 0x68, 0x80, 0x98,
@@ -356,7 +354,6 @@ static const struct dpu_lm_sub_blks sdm845_lm_sblk = { 
};



static const struct dpu_lm_sub_blks sc7180_lm_sblk = {

	.maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,

	.maxblendstages = 7, /* excluding base layer */

	.blendstage_base = { /* offsets relative to mixer base */

		0x20, 0x38, 0x50, 0x68, 0x80, 0x98, 0xb0
@@ -364,7 +361,6 @@ static const struct dpu_lm_sub_blks sc7180_lm_sblk = { 
};



static const struct dpu_lm_sub_blks sm8750_lm_sblk = {

	.maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,

	.maxblendstages = 11, /* excluding base layer */

	.blendstage_base = { /* offsets relative to mixer base */

		/* 0x40 + n*0x30 */
@@ -374,7 +370,6 @@ static const struct dpu_lm_sub_blks sm8750_lm_sblk = { 
};



static const struct dpu_lm_sub_blks qcm2290_lm_sblk = {

	.maxwidth = DEFAULT_DPU_LINE_WIDTH,

	.maxblendstages = 4, /* excluding base layer */

	.blendstage_base = { /* offsets relative to mixer base */

		0x20, 0x38, 0x50, 0x68

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

+0 −1
Original line number Diff line number Diff line
@@ -307,7 +307,6 @@ struct dpu_sspp_sub_blks { 
 * @blendstage_base:        Blend-stage register base offset

 */

struct dpu_lm_sub_blks {

	u32 maxwidth;

	u32 maxblendstages;

	u32 blendstage_base[MAX_BLOCKS];

};