Commit 48195dd1 authored by Paolo Abeni's avatar Paolo Abeni
Browse files

Merge branch 'add-netc-timer-ptp-driver-and-add-ptp-support-for-i-mx95'

Wei Fang says:

====================
Add NETC Timer PTP driver and add PTP support for i.MX95

This series adds NETC Timer PTP clock driver, which supports precise
periodic pulse, time capture on external pulse and PTP synchronization.
It also adds PTP support to the enetc v4 driver for i.MX95 and optimizes
the PTP-related code in the enetc driver.
====================

Link: https://patch.msgid.link/20250829050615.1247468-1-wei.fang@nxp.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parents 2fd4161d 93081d4e
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+5 −0
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@@ -108,6 +108,11 @@ properties:
    $ref: "#/properties/phy-handle"
    deprecated: true

  ptp-timer:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Specifies a reference to a node representing an IEEE 1588 PTP device.

  rx-fifo-depth:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
+0 −4
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@@ -81,10 +81,6 @@ properties:
      An array of two references: the first is the FMan RX port and the second
      is the TX port used by this MAC.

  ptp-timer:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: A reference to the IEEE1588 timer

  phys:
    description: A reference to the SerDes lane(s)
    maxItems: 1
+63 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ptp/nxp,ptp-netc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP NETC V4 Timer PTP clock

description:
  NETC V4 Timer provides current time with nanosecond resolution, precise
  periodic pulse, pulse on timeout (alarm), and time capture on external
  pulse support. And it supports time synchronization as required for
  IEEE 1588 and IEEE 802.1AS-2020.

maintainers:
  - Wei Fang <wei.fang@nxp.com>
  - Clark Wang <xiaoning.wang@nxp.com>

properties:
  compatible:
    enum:
      - pci1131,ee02

  reg:
    maxItems: 1

  clocks:
    maxItems: 1
    description:
      The reference clock of NETC Timer, can be selected between 3 different
      clock sources using an integrated hardware mux TMR_CTRL[CK_SEL].
      The "ccm" means the reference clock comes from CCM of SoC.
      The "ext" means the reference clock comes from external IO pins.
      If not present, indicates that the system clock of NETC IP is selected
      as the reference clock.

  clock-names:
    enum:
      - ccm
      - ext

required:
  - compatible
  - reg

allOf:
  - $ref: /schemas/pci/pci-device.yaml

unevaluatedProperties: false

examples:
  - |
    pcie {
        #address-cells = <3>;
        #size-cells = <2>;

        ptp-timer@18,0 {
            compatible = "pci1131,ee02";
            reg = <0x00c000 0 0 0 0>;
            clocks = <&scmi_clk 18>;
            clock-names = "ccm";
        };
    };
+9 −0
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@@ -18292,6 +18292,15 @@ F: Documentation/devicetree/bindings/clock/*imx*
F:	drivers/clk/imx/
F:	include/dt-bindings/clock/*imx*
NXP NETC TIMER PTP CLOCK DRIVER
M:	Wei Fang <wei.fang@nxp.com>
M:	Clark Wang <xiaoning.wang@nxp.com>
L:	imx@lists.linux.dev
L:	netdev@vger.kernel.org
S:	Maintained
F:	Documentation/devicetree/bindings/ptp/nxp,ptp-netc.yaml
F:	drivers/ptp/ptp_netc.c
NXP PF8100/PF8121A/PF8200 PMIC REGULATOR DEVICE DRIVER
M:	Jagan Teki <jagan@amarulasolutions.com>
S:	Maintained
+3 −0
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@@ -28,6 +28,7 @@ config NXP_NTMP

config FSL_ENETC
	tristate "ENETC PF driver"
	depends on PTP_1588_CLOCK_OPTIONAL
	depends on PCI_MSI
	select FSL_ENETC_CORE
	select FSL_ENETC_IERB
@@ -45,6 +46,7 @@ config FSL_ENETC

config NXP_ENETC4
	tristate "ENETC4 PF driver"
	depends on PTP_1588_CLOCK_OPTIONAL
	depends on PCI_MSI
	select FSL_ENETC_CORE
	select FSL_ENETC_MDIO
@@ -62,6 +64,7 @@ config NXP_ENETC4

config FSL_ENETC_VF
	tristate "ENETC VF driver"
	depends on PTP_1588_CLOCK_OPTIONAL
	depends on PCI_MSI
	select FSL_ENETC_CORE
	select FSL_ENETC_MDIO
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