Commit 4819c64e authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'renesas-pinctrl-fixes-for-v7.0-tag1' of... 

Merge tag 'renesas-pinctrl-fixes-for-v7.0-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers

 into fixes

pinctrl: renesas: Fixes for v7.0

  - Fix device node leaks and invalid wait contexts on RZ/T2H and
    RZ/N2H,
  - Fix GPIO .get() callback on RZ/A1.

Signed-off-by: default avatarLinus Walleij <linusw@kernel.org>
parents 26344753 fb22bb97

drivers/pinctrl/renesas/pinctrl-rza1.c

+1 −1
Original line number Diff line number Diff line
@@ -589,7 +589,7 @@ static inline unsigned int rza1_get_bit(struct rza1_port *port, 
{

	void __iomem *mem = RZA1_ADDR(port->base, reg, port->id);



	return ioread16(mem) & BIT(bit);

	return !!(ioread16(mem) & BIT(bit));

}



/**

drivers/pinctrl/renesas/pinctrl-rzt2h.c

+8 −7
Original line number Diff line number Diff line
@@ -85,7 +85,7 @@ struct rzt2h_pinctrl { 
	struct gpio_chip		gpio_chip;

	struct pinctrl_gpio_range	gpio_range;

	DECLARE_BITMAP(used_irqs, RZT2H_INTERRUPTS_NUM);

	spinlock_t			lock; /* lock read/write registers */

	raw_spinlock_t			lock; /* lock read/write registers */

	struct mutex			mutex; /* serialize adding groups and functions */

	bool				safety_port_enabled;

	atomic_t			wakeup_path;
@@ -145,7 +145,7 @@ static void rzt2h_pinctrl_set_pfc_mode(struct rzt2h_pinctrl *pctrl, 
	u64 reg64;

	u16 reg16;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	/* Set pin to 'Non-use (Hi-Z input protection)'  */

	reg16 = rzt2h_pinctrl_readw(pctrl, port, PM(port));
@@ -474,7 +474,7 @@ static int rzt2h_gpio_request(struct gpio_chip *chip, unsigned int offset) 
	if (ret)

		return ret;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	/* Select GPIO mode in PMC Register */

	rzt2h_pinctrl_set_gpio_en(pctrl, port, bit, true);
@@ -487,7 +487,7 @@ static void rzt2h_gpio_set_direction(struct rzt2h_pinctrl *pctrl, u32 port, 
{

	u16 reg;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	reg = rzt2h_pinctrl_readw(pctrl, port, PM(port));

	reg &= ~PM_PIN_MASK(bit);
@@ -509,7 +509,7 @@ static int rzt2h_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) 
	if (ret)

		return ret;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	if (rzt2h_pinctrl_readb(pctrl, port, PMC(port)) & BIT(bit)) {

		/*
@@ -547,7 +547,7 @@ static int rzt2h_gpio_set(struct gpio_chip *chip, unsigned int offset, 
	u8 bit = RZT2H_PIN_ID_TO_PIN(offset);

	u8 reg;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	reg = rzt2h_pinctrl_readb(pctrl, port, P(port));

	if (value)
@@ -833,6 +833,7 @@ static int rzt2h_gpio_register(struct rzt2h_pinctrl *pctrl) 
	if (ret)

		return dev_err_probe(dev, ret, "Unable to parse gpio-ranges\n");



	of_node_put(of_args.np);

	if (of_args.args[0] != 0 || of_args.args[1] != 0 ||

	    of_args.args[2] != pctrl->data->n_port_pins)

		return dev_err_probe(dev, -EINVAL,
@@ -964,7 +965,7 @@ static int rzt2h_pinctrl_probe(struct platform_device *pdev) 
	if (ret)

		return ret;



	spin_lock_init(&pctrl->lock);

	raw_spin_lock_init(&pctrl->lock);

	mutex_init(&pctrl->mutex);

	platform_set_drvdata(pdev, pctrl);