Commit 485aaebd authored by Jouni Högander's avatar Jouni Högander
Browse files

drm/i915/psr: Pass intel_crtc_state instead of intel_dp in wait_for_idle 



This is preparation to add own function for polling PSR being ready for
update when doing dsb commit.

Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarMika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250905072708.2659411-2-jouni.hogander@intel.com
parent 70a9b201

drivers/gpu/drm/i915/display/intel_psr.c

+10 −8
Original line number Diff line number Diff line
@@ -2997,10 +2997,11 @@ void intel_psr_post_plane_update(struct intel_atomic_state *state, 
	}

}



static int _psr2_ready_for_pipe_update_locked(struct intel_dp *intel_dp)

static int

_psr2_ready_for_pipe_update_locked(const struct intel_crtc_state *new_crtc_state)

{

	struct intel_display *display = to_intel_display(intel_dp);

	enum transcoder cpu_transcoder = intel_dp->psr.transcoder;

	struct intel_display *display = to_intel_display(new_crtc_state);

	enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;



	/*

	 * Any state lower than EDP_PSR2_STATUS_STATE_DEEP_SLEEP is enough.
@@ -3012,10 +3013,11 @@ static int _psr2_ready_for_pipe_update_locked(struct intel_dp *intel_dp) 
				       EDP_PSR2_STATUS_STATE_DEEP_SLEEP, 50);

}



static int _psr1_ready_for_pipe_update_locked(struct intel_dp *intel_dp)

static int

_psr1_ready_for_pipe_update_locked(const struct intel_crtc_state *new_crtc_state)

{

	struct intel_display *display = to_intel_display(intel_dp);

	enum transcoder cpu_transcoder = intel_dp->psr.transcoder;

	struct intel_display *display = to_intel_display(new_crtc_state);

	enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;



	/*

	 * From bspec: Panel Self Refresh (BDW+)
@@ -3054,9 +3056,9 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat 
			continue;



		if (intel_dp->psr.sel_update_enabled)

			ret = _psr2_ready_for_pipe_update_locked(intel_dp);

			ret = _psr2_ready_for_pipe_update_locked(new_crtc_state);

		else

			ret = _psr1_ready_for_pipe_update_locked(intel_dp);

			ret = _psr1_ready_for_pipe_update_locked(new_crtc_state);



		if (ret)

			drm_err(display->drm,