Commit 485e13fe authored by Sunyeal Hong's avatar Sunyeal Hong Committed by Krzysztof Kozlowski
Browse files

clk: samsung: add top clock support for ExynosAuto v920 SoC 



This adds support for CMU_TOP which generates clocks for all the
function blocks such as CORE, HSI0/1/2, PERIC0/1 and so on. For
CMU_TOP, PLL_SHARED0,1,2,3,4 and 5 will be the sources of this block
and they will generate bus clocks.

Signed-off-by: default avatarSunyeal Hong <sunyeal.hong@samsung.com>
Link: https://lore.kernel.org/r/20240821232652.1077701-5-sunyeal.hong@samsung.com


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 9224e288

drivers/clk/samsung/Makefile

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Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7.o 
obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynos7885.o

obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynos850.o

obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynosautov9.o

obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynosautov920.o

obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-gs101.o

obj-$(CONFIG_S3C64XX_COMMON_CLK)	+= clk-s3c64xx.o

obj-$(CONFIG_S5PV210_COMMON_CLK)	+= clk-s5pv210.o clk-s5pv210-audss.o

drivers/clk/samsung/clk-exynosautov920.c

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File added.

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