Commit 487df683 authored by Lu Baolu's avatar Lu Baolu Committed by Joerg Roedel
Browse files

iommu/vt-d: Remove has_iotlb_device flag 



The has_iotlb_device flag was used to indicate if a domain had attached
devices with ATS enabled. Domains without this flag didn't require device
TLB invalidation during unmap operations, optimizing performance by
avoiding unnecessary device iteration.

With the introduction of cache tags, this flag is no longer needed. The
code to iterate over attached devices was removed by commit 06792d06
("iommu/vt-d: Cleanup use of iommu_flush_iotlb_psi()").

Remove has_iotlb_device to avoid unnecessary code.

Suggested-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Signed-off-by: default avatarLu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: default avatarKevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20240809055431.36513-5-baolu.lu@linux.intel.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 2c13012e

drivers/iommu/intel/iommu.c

+1 −33
Original line number Diff line number Diff line
@@ -485,7 +485,6 @@ void domain_update_iommu_cap(struct dmar_domain *domain) 
		domain->domain.geometry.aperture_end = __DOMAIN_MAX_ADDR(domain->gaw);



	domain->domain.pgsize_bitmap |= domain_super_pgsize_bitmap(domain);

	domain_update_iotlb(domain);

}



struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
@@ -1263,32 +1262,6 @@ domain_lookup_dev_info(struct dmar_domain *domain, 
	return NULL;

}



void domain_update_iotlb(struct dmar_domain *domain)

{

	struct dev_pasid_info *dev_pasid;

	struct device_domain_info *info;

	bool has_iotlb_device = false;

	unsigned long flags;



	spin_lock_irqsave(&domain->lock, flags);

	list_for_each_entry(info, &domain->devices, link) {

		if (info->ats_enabled) {

			has_iotlb_device = true;

			break;

		}

	}



	list_for_each_entry(dev_pasid, &domain->dev_pasids, link_domain) {

		info = dev_iommu_priv_get(dev_pasid->dev);

		if (info->ats_enabled) {

			has_iotlb_device = true;

			break;

		}

	}

	domain->has_iotlb_device = has_iotlb_device;

	spin_unlock_irqrestore(&domain->lock, flags);

}



/*

 * The extra devTLB flush quirk impacts those QAT devices with PCI device

 * IDs ranging from 0x4940 to 0x4943. It is exempted from risky_device()
@@ -1325,10 +1298,8 @@ static void iommu_enable_pci_caps(struct device_domain_info *info) 
		info->pasid_enabled = 1;



	if (info->ats_supported && pci_ats_page_aligned(pdev) &&

	    !pci_enable_ats(pdev, VTD_PAGE_SHIFT)) {

	    !pci_enable_ats(pdev, VTD_PAGE_SHIFT))

		info->ats_enabled = 1;

		domain_update_iotlb(info->domain);

	}

}



static void iommu_disable_pci_caps(struct device_domain_info *info)
@@ -1343,7 +1314,6 @@ static void iommu_disable_pci_caps(struct device_domain_info *info) 
	if (info->ats_enabled) {

		pci_disable_ats(pdev);

		info->ats_enabled = 0;

		domain_update_iotlb(info->domain);

	}



	if (info->pasid_enabled) {
@@ -1517,7 +1487,6 @@ static struct dmar_domain *alloc_domain(unsigned int type) 
	domain->nid = NUMA_NO_NODE;

	if (first_level_by_default(type))

		domain->use_first_level = true;

	domain->has_iotlb_device = false;

	INIT_LIST_HEAD(&domain->devices);

	INIT_LIST_HEAD(&domain->dev_pasids);

	INIT_LIST_HEAD(&domain->cache_tags);
@@ -3518,7 +3487,6 @@ static struct dmar_domain *paging_domain_alloc(struct device *dev, bool first_st 
	xa_init(&domain->iommu_array);



	domain->nid = dev_to_node(dev);

	domain->has_iotlb_device = info->ats_enabled;

	domain->use_first_level = first_stage;



	/* calculate the address width */

drivers/iommu/intel/iommu.h

+0 −2
Original line number Diff line number Diff line
@@ -588,7 +588,6 @@ struct dmar_domain { 
	int	nid;			/* node id */

	struct xarray iommu_array;	/* Attached IOMMU array */



	u8 has_iotlb_device: 1;

	u8 iommu_coherency: 1;		/* indicate coherency of iommu access */

	u8 force_snooping : 1;		/* Create IOPTEs with snoop control */

	u8 set_pte_snp:1;
@@ -1104,7 +1103,6 @@ int qi_submit_sync(struct intel_iommu *iommu, struct qi_desc *desc, 
 */

#define QI_OPT_WAIT_DRAIN		BIT(0)



void domain_update_iotlb(struct dmar_domain *domain);

int domain_attach_iommu(struct dmar_domain *domain, struct intel_iommu *iommu);

void domain_detach_iommu(struct dmar_domain *domain, struct intel_iommu *iommu);

void device_block_translation(struct device *dev);

drivers/iommu/intel/nested.c

+0 −2
Original line number Diff line number Diff line
@@ -66,8 +66,6 @@ static int intel_nested_attach_dev(struct iommu_domain *domain, 
	list_add(&info->link, &dmar_domain->devices);

	spin_unlock_irqrestore(&dmar_domain->lock, flags);



	domain_update_iotlb(dmar_domain);



	return 0;

unassign_tag:

	cache_tag_unassign_domain(dmar_domain, dev, IOMMU_NO_PASID);