Commit 491fadb2 authored by Akhil P Oommen's avatar Akhil P Oommen Committed by Rob Clark
Browse files

drm/msm/adreno: Move adreno_gpu_func to catalogue 



In A6x family (which is a pretty big one), there are separate
adreno_func definitions for each sub-generations. To streamline the
identification of the correct struct for a gpu, move it to the
catalogue and move the gpu_init routine to struct adreno_gpu_funcs.

Signed-off-by: default avatarAkhil P Oommen <akhilpo@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/689003/


Message-ID: <20251118-kaana-gpu-support-v4-6-86eeb8e93fb6@oss.qualcomm.com>
Signed-off-by: default avatarRob Clark <robin.clark@oss.qualcomm.com>
parent f5232d63

drivers/gpu/drm/msm/adreno/a2xx_catalog.c

+4 −3
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
 */



#include "adreno_gpu.h"

#include "a2xx_gpu.h"



static const struct adreno_info a2xx_gpus[] = {

	{
@@ -19,7 +20,7 @@ static const struct adreno_info a2xx_gpus[] = { 
		},

		.gmem  = SZ_256K,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init  = a2xx_gpu_init,

		.funcs = &a2xx_gpu_funcs,

	}, { /* a200 on i.mx51 has only 128kib gmem */

		.chip_ids = ADRENO_CHIP_IDS(0x02000001),

		.family = ADRENO_2XX_GEN1,
@@ -30,7 +31,7 @@ static const struct adreno_info a2xx_gpus[] = { 
		},

		.gmem  = SZ_128K,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init  = a2xx_gpu_init,

		.funcs = &a2xx_gpu_funcs,

	}, {

		.chip_ids = ADRENO_CHIP_IDS(0x02020000),

		.family = ADRENO_2XX_GEN2,
@@ -41,7 +42,7 @@ static const struct adreno_info a2xx_gpus[] = { 
		},

		.gmem  = SZ_512K,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init  = a2xx_gpu_init,

		.funcs = &a2xx_gpu_funcs,

	}

};

DECLARE_ADRENO_GPULIST(a2xx);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

+26 −24
Original line number Diff line number Diff line
@@ -486,39 +486,18 @@ static u32 a2xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) 
	return ring->memptrs->rptr;

}



static const struct adreno_gpu_funcs funcs = {

	.base = {

		.get_param = adreno_get_param,

		.set_param = adreno_set_param,

		.hw_init = a2xx_hw_init,

		.pm_suspend = msm_gpu_pm_suspend,

		.pm_resume = msm_gpu_pm_resume,

		.recover = a2xx_recover,

		.submit = a2xx_submit,

		.active_ring = adreno_active_ring,

		.irq = a2xx_irq,

		.destroy = a2xx_destroy,

#if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP)

		.show = adreno_show,

#endif

		.gpu_state_get = a2xx_gpu_state_get,

		.gpu_state_put = adreno_gpu_state_put,

		.create_vm = a2xx_create_vm,

		.get_rptr = a2xx_get_rptr,

	},

};



static const struct msm_gpu_perfcntr perfcntrs[] = {

/* TODO */

};



struct msm_gpu *a2xx_gpu_init(struct drm_device *dev)

static struct msm_gpu *a2xx_gpu_init(struct drm_device *dev)

{

	struct a2xx_gpu *a2xx_gpu = NULL;

	struct adreno_gpu *adreno_gpu;

	struct msm_gpu *gpu;

	struct msm_drm_private *priv = dev->dev_private;

	struct platform_device *pdev = priv->gpu_pdev;

	struct adreno_platform_config *config = pdev->dev.platform_data;

	int ret;



	if (!pdev) {
@@ -539,7 +518,7 @@ struct msm_gpu *a2xx_gpu_init(struct drm_device *dev) 
	gpu->perfcntrs = perfcntrs;

	gpu->num_perfcntrs = ARRAY_SIZE(perfcntrs);



	ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 1);

	ret = adreno_gpu_init(dev, pdev, adreno_gpu, config->info->funcs, 1);

	if (ret)

		goto fail;
@@ -558,3 +537,26 @@ struct msm_gpu *a2xx_gpu_init(struct drm_device *dev) 


	return ERR_PTR(ret);

}



const struct adreno_gpu_funcs a2xx_gpu_funcs = {

	.base = {

		.get_param = adreno_get_param,

		.set_param = adreno_set_param,

		.hw_init = a2xx_hw_init,

		.pm_suspend = msm_gpu_pm_suspend,

		.pm_resume = msm_gpu_pm_resume,

		.recover = a2xx_recover,

		.submit = a2xx_submit,

		.active_ring = adreno_active_ring,

		.irq = a2xx_irq,

		.destroy = a2xx_destroy,

#if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP)

		.show = adreno_show,

#endif

		.gpu_state_get = a2xx_gpu_state_get,

		.gpu_state_put = adreno_gpu_state_put,

		.create_vm = a2xx_create_vm,

		.get_rptr = a2xx_get_rptr,

	},

	.init = a2xx_gpu_init,

};

drivers/gpu/drm/msm/adreno/a2xx_gpu.h

+2 −0
Original line number Diff line number Diff line
@@ -19,6 +19,8 @@ struct a2xx_gpu { 
};

#define to_a2xx_gpu(x) container_of(x, struct a2xx_gpu, base)



extern const struct adreno_gpu_funcs a2xx_gpu_funcs;



struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu);

void a2xx_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,

		dma_addr_t *tran_error);

drivers/gpu/drm/msm/adreno/a3xx_catalog.c

+7 −6
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
 */



#include "adreno_gpu.h"

#include "a3xx_gpu.h"



static const struct adreno_info a3xx_gpus[] = {

	{
@@ -18,7 +19,7 @@ static const struct adreno_info a3xx_gpus[] = { 
		},

		.gmem  = SZ_128K,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init  = a3xx_gpu_init,

		.funcs = &a3xx_gpu_funcs,

	}, {

		.chip_ids = ADRENO_CHIP_IDS(0x03000520),

		.family = ADRENO_3XX,
@@ -29,7 +30,7 @@ static const struct adreno_info a3xx_gpus[] = { 
		},

		.gmem  = SZ_256K,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init  = a3xx_gpu_init,

		.funcs = &a3xx_gpu_funcs,

	}, {

		.chip_ids = ADRENO_CHIP_IDS(0x03000600),

		.family = ADRENO_3XX,
@@ -40,7 +41,7 @@ static const struct adreno_info a3xx_gpus[] = { 
		},

		.gmem  = SZ_128K,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init  = a3xx_gpu_init,

		.funcs = &a3xx_gpu_funcs,

	}, {

		.chip_ids = ADRENO_CHIP_IDS(0x03000620),

		.family = ADRENO_3XX,
@@ -51,7 +52,7 @@ static const struct adreno_info a3xx_gpus[] = { 
		},

		.gmem = SZ_128K,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init = a3xx_gpu_init,

		.funcs = &a3xx_gpu_funcs,

	}, {

		.chip_ids = ADRENO_CHIP_IDS(

			0x03020000,
@@ -66,7 +67,7 @@ static const struct adreno_info a3xx_gpus[] = { 
		},

		.gmem  = SZ_512K,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init  = a3xx_gpu_init,

		.funcs = &a3xx_gpu_funcs,

	}, {

		.chip_ids = ADRENO_CHIP_IDS(

			0x03030000,
@@ -81,7 +82,7 @@ static const struct adreno_info a3xx_gpus[] = { 
		},

		.gmem  = SZ_1M,

		.inactive_period = DRM_MSM_INACTIVE_PERIOD,

		.init  = a3xx_gpu_init,

		.funcs = &a3xx_gpu_funcs,

	}

};

DECLARE_ADRENO_GPULIST(a3xx);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

+27 −25
Original line number Diff line number Diff line
@@ -508,29 +508,6 @@ static u32 a3xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) 
	return ring->memptrs->rptr;

}



static const struct adreno_gpu_funcs funcs = {

	.base = {

		.get_param = adreno_get_param,

		.set_param = adreno_set_param,

		.hw_init = a3xx_hw_init,

		.pm_suspend = msm_gpu_pm_suspend,

		.pm_resume = msm_gpu_pm_resume,

		.recover = a3xx_recover,

		.submit = a3xx_submit,

		.active_ring = adreno_active_ring,

		.irq = a3xx_irq,

		.destroy = a3xx_destroy,

#if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP)

		.show = adreno_show,

#endif

		.gpu_busy = a3xx_gpu_busy,

		.gpu_state_get = a3xx_gpu_state_get,

		.gpu_state_put = adreno_gpu_state_put,

		.create_vm = adreno_create_vm,

		.get_rptr = a3xx_get_rptr,

	},

};



static const struct msm_gpu_perfcntr perfcntrs[] = {

	{ REG_A3XX_SP_PERFCOUNTER6_SELECT, REG_A3XX_RBBM_PERFCTR_SP_6_LO,

			SP_ALU_ACTIVE_CYCLES, "ALUACTIVE" },
@@ -538,13 +515,14 @@ static const struct msm_gpu_perfcntr perfcntrs[] = { 
			SP_FS_FULL_ALU_INSTRUCTIONS, "ALUFULL" },

};



struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)

static struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)

{

	struct a3xx_gpu *a3xx_gpu = NULL;

	struct adreno_gpu *adreno_gpu;

	struct msm_gpu *gpu;

	struct msm_drm_private *priv = dev->dev_private;

	struct platform_device *pdev = priv->gpu_pdev;

	struct adreno_platform_config *config = pdev->dev.platform_data;

	struct icc_path *ocmem_icc_path;

	struct icc_path *icc_path;

	int ret;
@@ -569,7 +547,7 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev) 


	adreno_gpu->registers = a3xx_registers;



	ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 1);

	ret = adreno_gpu_init(dev, pdev, adreno_gpu, config->info->funcs, 1);

	if (ret)

		goto fail;
@@ -613,3 +591,27 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev) 


	return ERR_PTR(ret);

}



const struct adreno_gpu_funcs a3xx_gpu_funcs = {

	.base = {

		.get_param = adreno_get_param,

		.set_param = adreno_set_param,

		.hw_init = a3xx_hw_init,

		.pm_suspend = msm_gpu_pm_suspend,

		.pm_resume = msm_gpu_pm_resume,

		.recover = a3xx_recover,

		.submit = a3xx_submit,

		.active_ring = adreno_active_ring,

		.irq = a3xx_irq,

		.destroy = a3xx_destroy,

#if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP)

		.show = adreno_show,

#endif

		.gpu_busy = a3xx_gpu_busy,

		.gpu_state_get = a3xx_gpu_state_get,

		.gpu_state_put = adreno_gpu_state_put,

		.create_vm = adreno_create_vm,

		.get_rptr = a3xx_get_rptr,

	},

	.init = a3xx_gpu_init,

};