Commit 494d4a05 authored Jan 25, 2026 by Austin Kim Committed by Paul Walmsley Jan 25, 2026

riscv: fix minor typo in syscall.h comment



Some developers may be confused because RISC-V does not have
a register named r0. Also, orig_r0 is not available in pt_regs structure,
which is specific to riscv. So we had better fix this minor typo.

Signed-off-by: Austin Kim <austin.kim@lge.com>
Link: https://patch.msgid.link/aW3Z4zTBvGJpk7a7@adminpc-PowerEdge-R7525


Signed-off-by: Paul Walmsley <pjw@kernel.org>

parent ba89709a

arch/riscv/include/asm/syscall.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -20,7 +20,7 @@ extern void * const sys_call_table[];
		extern void * const compat_sys_call_table[];

		/*
		* Only the low 32 bits of orig_r0 are meaningful, so we return int.
		* Only the low 32 bits of orig_a0 are meaningful, so we return int.
		* This importantly ignores the high bits on 64-bit, so comparisons
		* sign-extend the low 32 bits.
		*/