Commit 495d6f77 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915: pass dev_priv explicitly to DSPOFFSET 



Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPOFFSET register macro.

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c1d487d2c753221144e8fb8f17e5eb2826dba5f2.1716469091.git.jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent d434ac62

drivers/gpu/drm/i915/display/i9xx_plane.c

+3 −2
Original line number Diff line number Diff line
@@ -482,7 +482,7 @@ static void i9xx_plane_update_arm(struct intel_plane *plane, 
	}



	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {

		intel_de_write_fw(dev_priv, DSPOFFSET(i9xx_plane),

		intel_de_write_fw(dev_priv, DSPOFFSET(dev_priv, i9xx_plane),

				  DISP_OFFSET_Y(y) | DISP_OFFSET_X(x));

	} else if (DISPLAY_VER(dev_priv) >= 4) {

		intel_de_write_fw(dev_priv, DSPLINOFF(dev_priv, i9xx_plane),
@@ -1033,7 +1033,8 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc, 
	fb->format = drm_format_info(fourcc);



	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {

		offset = intel_de_read(dev_priv, DSPOFFSET(i9xx_plane));

		offset = intel_de_read(dev_priv,

				       DSPOFFSET(dev_priv, i9xx_plane));

		base = intel_de_read(dev_priv, DSPSURF(dev_priv, i9xx_plane)) & DISP_ADDR_MASK;

	} else if (DISPLAY_VER(dev_priv) >= 4) {

		if (plane_config->tiling)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -78,7 +78,7 @@ 
#define   DISP_OFFSET_X(x)		REG_FIELD_PREP(DISP_OFFSET_X_MASK, (x))



#define _DSPAOFFSET				0x701A4 /* hsw+ */

#define DSPOFFSET(plane)			_MMIO_PIPE2(dev_priv, plane, _DSPAOFFSET)

#define DSPOFFSET(dev_priv, plane)		_MMIO_PIPE2(dev_priv, plane, _DSPAOFFSET)



#define _DSPASURFLIVE				0x701AC /* g4x+ */

#define DSPSURFLIVE(plane)			_MMIO_PIPE2(dev_priv, plane, _DSPASURFLIVE)

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

+3 −3
Original line number Diff line number Diff line
@@ -171,7 +171,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) 
	MMIO_D(DSPPOS(dev_priv, PIPE_A));

	MMIO_D(DSPSIZE(dev_priv, PIPE_A));

	MMIO_D(DSPSURF(dev_priv, PIPE_A));

	MMIO_D(DSPOFFSET(PIPE_A));

	MMIO_D(DSPOFFSET(dev_priv, PIPE_A));

	MMIO_D(DSPSURFLIVE(PIPE_A));

	MMIO_D(REG_50080(PIPE_A, PLANE_PRIMARY));

	MMIO_D(DSPCNTR(dev_priv, PIPE_B));
@@ -180,7 +180,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) 
	MMIO_D(DSPPOS(dev_priv, PIPE_B));

	MMIO_D(DSPSIZE(dev_priv, PIPE_B));

	MMIO_D(DSPSURF(dev_priv, PIPE_B));

	MMIO_D(DSPOFFSET(PIPE_B));

	MMIO_D(DSPOFFSET(dev_priv, PIPE_B));

	MMIO_D(DSPSURFLIVE(PIPE_B));

	MMIO_D(REG_50080(PIPE_B, PLANE_PRIMARY));

	MMIO_D(DSPCNTR(dev_priv, PIPE_C));
@@ -189,7 +189,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) 
	MMIO_D(DSPPOS(dev_priv, PIPE_C));

	MMIO_D(DSPSIZE(dev_priv, PIPE_C));

	MMIO_D(DSPSURF(dev_priv, PIPE_C));

	MMIO_D(DSPOFFSET(PIPE_C));

	MMIO_D(DSPOFFSET(dev_priv, PIPE_C));

	MMIO_D(DSPSURFLIVE(PIPE_C));

	MMIO_D(REG_50080(PIPE_C, PLANE_PRIMARY));

	MMIO_D(SPRCTL(PIPE_A));