Commit 4985a545 authored by Julius Werner's avatar Julius Werner Committed by Krzysztof Kozlowski
Browse files

dt-bindings: memory: Add jedec,lpddrX-channel binding 



This patch adds a new device tree binding for an LPDDR channel to serve
as a top-level organizing node for LPDDR part nodes nested below it. An
LPDDR channel needs to have an "io-width" property to describe its width
(this is important because this width does not always match the io-width
of the part number, indicating that multiple parts are wired in parallel
on the same channel), as well as one or more nested "rank@X" nodes.
Those represent information about the individual ranks of each LPDDR
part connected on that channel and should match the existing
"jedec,lpddrX" bindings for individual LPDDR parts.

New platforms should be using this node -- the existing practice of
providing a raw, toplevel "jedec,lpddrX" node without indication of how
many identical parts are in the system should be considered deprecated.

Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220930220606.303395-4-jwerner@chromium.org


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent a500528f

Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml

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+146 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: LPDDR channel with chip/rank topology description



description:

  An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS,

  CK, etc.) that connect one or more LPDDR chips to a host system. The main

  purpose of this node is to overall LPDDR topology of the system, including the

  amount of individual LPDDR chips and the ranks per chip.



maintainers:

  - Julius Werner <jwerner@chromium.org>



properties:

  compatible:

    enum:

      - jedec,lpddr2-channel

      - jedec,lpddr3-channel

      - jedec,lpddr4-channel

      - jedec,lpddr5-channel



  io-width:

    description:

      The number of DQ pins in the channel. If this number is different

      from (a multiple of) the io-width of the LPDDR chip, that means that

      multiple instances of that type of chip are wired in parallel on this

      channel (with the channel's DQ pins split up between the different

      chips, and the CA, CS, etc. pins of the different chips all shorted

      together).  This means that the total physical memory controlled by a

      channel is equal to the sum of the densities of each rank on the

      connected LPDDR chip, times the io-width of the channel divided by

      the io-width of the LPDDR chip.

    enum:

      - 8

      - 16

      - 32

      - 64

      - 128



  "#address-cells":

    const: 1



  "#size-cells":

    const: 0



patternProperties:

  "^rank@[0-9]+$":

    type: object

    description:

      Each physical LPDDR chip may have one or more ranks. Ranks are

      internal but fully independent sub-units of the chip. Each LPDDR bus

      transaction on the channel targets exactly one rank, based on the

      state of the CS pins. Different ranks may have different densities and

      timing requirements.

    required:

      - reg



allOf:

  - if:

      properties:

        compatible:

          contains:

            const: jedec,lpddr2-channel

    then:

      patternProperties:

        "^rank@[0-9]+$":

          $ref: /schemas/memory-controllers/ddr/jedec,lpddr2.yaml#

  - if:

      properties:

        compatible:

          contains:

            const: jedec,lpddr3-channel

    then:

      patternProperties:

        "^rank@[0-9]+$":

          $ref: /schemas/memory-controllers/ddr/jedec,lpddr3.yaml#

  - if:

      properties:

        compatible:

          contains:

            const: jedec,lpddr4-channel

    then:

      patternProperties:

        "^rank@[0-9]+$":

          $ref: /schemas/memory-controllers/ddr/jedec,lpddr4.yaml#

  - if:

      properties:

        compatible:

          contains:

            const: jedec,lpddr5-channel

    then:

      patternProperties:

        "^rank@[0-9]+$":

          $ref: /schemas/memory-controllers/ddr/jedec,lpddr5.yaml#



required:

  - compatible

  - io-width

  - "#address-cells"

  - "#size-cells"



additionalProperties: false



examples:

  - |

    lpddr-channel0 {

      #address-cells = <1>;

      #size-cells = <0>;

      compatible = "jedec,lpddr3-channel";

      io-width = <32>;



      rank@0 {

        compatible = "lpddr3-ff,0100", "jedec,lpddr3";

        reg = <0>;

        density = <8192>;

        io-width = <16>;

        revision-id = <1 0>;

      };

    };



    lpddr-channel1 {

      #address-cells = <1>;

      #size-cells = <0>;

      compatible = "jedec,lpddr4-channel";

      io-width = <32>;



      rank@0 {

        compatible = "lpddr4-05,0301", "jedec,lpddr4";

        reg = <0>;

        density = <4096>;

        io-width = <32>;

        revision-id = <3 1>;

      };



      rank@1 {

        compatible = "lpddr4-05,0301", "jedec,lpddr4";

        reg = <1>;

        density = <2048>;

        io-width = <32>;

        revision-id = <3 1>;

      };

    };

Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml

+9 −1
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@@ -9,7 +9,8 @@ title: Common properties for LPDDR types 
description:

  Different LPDDR types generally use the same properties and only differ in the

  range of legal values for each. This file defines the common parts that can be

  reused for each type.

  reused for each type. Nodes using this schema should generally be nested under

  an LPDDR channel node.



maintainers:

  - Krzysztof Kozlowski <krzk@kernel.org>
@@ -25,6 +26,13 @@ properties: 
      The latter form can be useful when LPDDR nodes are created at runtime by

      boot firmware that doesn't have access to static part number information.



  reg:

    description:

      The rank number of this LPDDR rank when used as a subnode to an LPDDR

      channel.

    minimum: 0

    maximum: 3



  revision-id:

    $ref: /schemas/types.yaml#/definitions/uint32-array

    description: