Commit 49ba1ca2 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'mlx5-misc-fixes-2025-04-23' 

Mark Bloch says:

====================
mlx5 misc fixes 2025-04-23

This patchset includes misc fixes from the team for the mlx5 core
and Ethernet drivers.
====================

Link: https://patch.msgid.link/20250423083611.324567-1-mbloch@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents bf20af07 90538d23

drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c

+2 −4
Original line number Diff line number Diff line
@@ -176,6 +176,7 @@ static int mlx5e_tx_reporter_ptpsq_unhealthy_recover(void *ctx) 


	priv = ptpsq->txqsq.priv;



	rtnl_lock();

	mutex_lock(&priv->state_lock);

	chs = &priv->channels;

	netdev = priv->netdev;
@@ -183,22 +184,19 @@ static int mlx5e_tx_reporter_ptpsq_unhealthy_recover(void *ctx) 
	carrier_ok = netif_carrier_ok(netdev);

	netif_carrier_off(netdev);



	rtnl_lock();

	mlx5e_deactivate_priv_channels(priv);

	rtnl_unlock();



	mlx5e_ptp_close(chs->ptp);

	err = mlx5e_ptp_open(priv, &chs->params, chs->c[0]->lag_port, &chs->ptp);



	rtnl_lock();

	mlx5e_activate_priv_channels(priv);

	rtnl_unlock();



	/* return carrier back if needed */

	if (carrier_ok)

		netif_carrier_on(netdev);



	mutex_unlock(&priv->state_lock);

	rtnl_unlock();



	return err;

}

drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c

+29 −3
Original line number Diff line number Diff line
@@ -165,9 +165,6 @@ static int mlx5e_tc_tun_parse_vxlan(struct mlx5e_priv *priv, 
	struct flow_match_enc_keyid enc_keyid;

	void *misc_c, *misc_v;



	misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);

	misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);



	if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID))

		return 0;
@@ -182,6 +179,30 @@ static int mlx5e_tc_tun_parse_vxlan(struct mlx5e_priv *priv, 
		err = mlx5e_tc_tun_parse_vxlan_gbp_option(priv, spec, f);

		if (err)

			return err;



		/* We can't mix custom tunnel headers with symbolic ones and we

		 * don't have a symbolic field name for GBP, so we use custom

		 * tunnel headers in this case. We need hardware support to

		 * match on custom tunnel headers, but we already know it's

		 * supported because the previous call successfully checked for

		 * that.

		 */

		misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,

				      misc_parameters_5);

		misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,

				      misc_parameters_5);



		/* Shift by 8 to account for the reserved bits in the vxlan

		 * header after the VNI.

		 */

		MLX5_SET(fte_match_set_misc5, misc_c, tunnel_header_1,

			 be32_to_cpu(enc_keyid.mask->keyid) << 8);

		MLX5_SET(fte_match_set_misc5, misc_v, tunnel_header_1,

			 be32_to_cpu(enc_keyid.key->keyid) << 8);



		spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_5;



		return 0;

	}



	/* match on VNI is required */
@@ -195,6 +216,11 @@ static int mlx5e_tc_tun_parse_vxlan(struct mlx5e_priv *priv, 
		return -EOPNOTSUPP;

	}



	misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,

			      misc_parameters);

	misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,

			      misc_parameters);



	MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,

		 be32_to_cpu(enc_keyid.mask->keyid));

	MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,

drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

+1 −4
Original line number Diff line number Diff line
@@ -1750,9 +1750,6 @@ extra_split_attr_dests_needed(struct mlx5e_tc_flow *flow, struct mlx5_flow_attr 
	    !list_is_first(&attr->list, &flow->attrs))

		return 0;



	if (flow_flag_test(flow, SLOW))

		return 0;



	esw_attr = attr->esw_attr;

	if (!esw_attr->split_count ||

	    esw_attr->split_count == esw_attr->out_count - 1)
@@ -1766,7 +1763,7 @@ extra_split_attr_dests_needed(struct mlx5e_tc_flow *flow, struct mlx5_flow_attr 
	for (i = esw_attr->split_count; i < esw_attr->out_count; i++) {

		/* external dest with encap is considered as internal by firmware */

		if (esw_attr->dests[i].vport == MLX5_VPORT_UPLINK &&

		    !(esw_attr->dests[i].flags & MLX5_ESW_DEST_ENCAP_VALID))

		    !(esw_attr->dests[i].flags & MLX5_ESW_DEST_ENCAP))

			ext_dest = true;

		else

			int_dest = true;

drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c

+4 −1
Original line number Diff line number Diff line
@@ -3533,7 +3533,9 @@ int esw_offloads_enable(struct mlx5_eswitch *esw) 
	int err;



	mutex_init(&esw->offloads.termtbl_mutex);

	mlx5_rdma_enable_roce(esw->dev);

	err = mlx5_rdma_enable_roce(esw->dev);

	if (err)

		goto err_roce;



	err = mlx5_esw_host_number_init(esw);

	if (err)
@@ -3594,6 +3596,7 @@ int esw_offloads_enable(struct mlx5_eswitch *esw) 
	esw_offloads_metadata_uninit(esw);

err_metadata:

	mlx5_rdma_disable_roce(esw->dev);

err_roce:

	mutex_destroy(&esw->offloads.termtbl_mutex);

	return err;

}

drivers/net/ethernet/mellanox/mlx5/core/rdma.c

+6 −5
Original line number Diff line number Diff line
@@ -118,8 +118,8 @@ static void mlx5_rdma_make_default_gid(struct mlx5_core_dev *dev, union ib_gid * 


static int mlx5_rdma_add_roce_addr(struct mlx5_core_dev *dev)

{

	u8 mac[ETH_ALEN] = {};

	union ib_gid gid;

	u8 mac[ETH_ALEN];



	mlx5_rdma_make_default_gid(dev, &gid);

	return mlx5_core_roce_gid_set(dev, 0,
@@ -140,17 +140,17 @@ void mlx5_rdma_disable_roce(struct mlx5_core_dev *dev) 
	mlx5_nic_vport_disable_roce(dev);

}



void mlx5_rdma_enable_roce(struct mlx5_core_dev *dev)

int mlx5_rdma_enable_roce(struct mlx5_core_dev *dev)

{

	int err;



	if (!MLX5_CAP_GEN(dev, roce))

		return;

		return 0;



	err = mlx5_nic_vport_enable_roce(dev);

	if (err) {

		mlx5_core_err(dev, "Failed to enable RoCE: %d\n", err);

		return;

		return err;

	}



	err = mlx5_rdma_add_roce_addr(dev);
@@ -165,10 +165,11 @@ void mlx5_rdma_enable_roce(struct mlx5_core_dev *dev) 
		goto del_roce_addr;

	}



	return;

	return err;



del_roce_addr:

	mlx5_rdma_del_roce_addr(dev);

disable_roce:

	mlx5_nic_vport_disable_roce(dev);

	return err;

}