Commit 4a1739c3 authored by Conor Dooley's avatar Conor Dooley
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riscv: dts: microchip: add tsu clock to macb on mpfs 



In increment mode, the tsu clock for the macb is provided separately to
the pck, usually the same clock as the reference to the rtc provided by
an off-chip oscillator. pclk is 150 MHz typically, and the reference is
either 100 MHz or 125 MHz, so having the tsu clock is required for
correct rate selection.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
parent feb5dba3

arch/riscv/boot/dts/microchip/mpfs.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -464,8 +464,8 @@ mac0: ethernet@20110000 { 
			interrupt-parent = <&plic>;

			interrupts = <64>, <65>, <66>, <67>, <68>, <69>;

			local-mac-address = [00 00 00 00 00 00];

			clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>;

			clock-names = "pclk", "hclk";

			clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>, <&refclk>;

			clock-names = "pclk", "hclk", "tsu_clk";

			resets = <&mss_top_sysreg CLK_MAC0>;

			status = "disabled";

		};
@@ -478,8 +478,8 @@ mac1: ethernet@20112000 { 
			interrupt-parent = <&plic>;

			interrupts = <70>, <71>, <72>, <73>, <74>, <75>;

			local-mac-address = [00 00 00 00 00 00];

			clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>;

			clock-names = "pclk", "hclk";

			clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>, <&refclk>;

			clock-names = "pclk", "hclk", "tsu_clk";

			resets = <&mss_top_sysreg CLK_MAC1>;

			status = "disabled";

		};