Commit 4a5524a2 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'mlx5-misc-enhancements-2025-03-19' 

Tariq Toukan says:

====================
mlx5 misc enhancements 2025-03-19

This series introduces multiple small misc enhancements
from the team to the mlx5 core and Eth drivers.
====================

Link: https://patch.msgid.link/1742392983-153050-1-git-send-email-tariqt@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 9da10c2d 56617e11

drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c

+11 −0
Original line number Diff line number Diff line
@@ -5,6 +5,16 @@ 
#include "en/tc_priv.h"

#include "en/tc_ct.h"



static bool

tc_act_can_offload_ct(struct mlx5e_tc_act_parse_state *parse_state,

		      const struct flow_action_entry *act,

		      int act_index,

		      struct mlx5_flow_attr *attr)

{

	return !((act->ct.action & TCA_CT_ACT_COMMIT) &&

		 flow_action_is_last_entry(parse_state->flow_action, act));

}



static int

tc_act_parse_ct(struct mlx5e_tc_act_parse_state *parse_state,

		const struct flow_action_entry *act,
@@ -56,6 +66,7 @@ tc_act_is_missable_ct(const struct flow_action_entry *act) 
}



struct mlx5e_tc_act mlx5e_tc_act_ct = {

	.can_offload = tc_act_can_offload_ct,

	.parse_action = tc_act_parse_ct,

	.post_parse = tc_act_post_parse_ct,

	.is_multi_table_act = tc_act_is_multi_table_act_ct,

drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c

+29 −0
Original line number Diff line number Diff line
@@ -1349,6 +1349,32 @@ mlx5_tc_ct_block_flow_offload_stats(struct mlx5_ct_ft *ft, 
	return 0;

}



static bool

mlx5_tc_ct_filter_legacy_non_nic_flows(struct mlx5_ct_ft *ft,

				       struct flow_cls_offload *flow)

{

	struct flow_rule *rule = flow_cls_offload_flow_rule(flow);

	struct mlx5_tc_ct_priv *ct_priv = ft->ct_priv;

	struct flow_match_meta match;

	struct net_device *netdev;

	bool same_dev = false;



	if (!is_mdev_legacy_mode(ct_priv->dev) ||

	    !flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META))

		return true;



	flow_rule_match_meta(rule, &match);



	if (!(match.key->ingress_ifindex & match.mask->ingress_ifindex))

		return true;



	netdev = dev_get_by_index(&init_net, match.key->ingress_ifindex);

	same_dev = ct_priv->netdev == netdev;

	dev_put(netdev);



	return same_dev;

}



static int

mlx5_tc_ct_block_flow_offload(enum tc_setup_type type, void *type_data,

			      void *cb_priv)
@@ -1361,6 +1387,9 @@ mlx5_tc_ct_block_flow_offload(enum tc_setup_type type, void *type_data, 


	switch (f->command) {

	case FLOW_CLS_REPLACE:

		if (!mlx5_tc_ct_filter_legacy_non_nic_flows(ft, f))

			return -EOPNOTSUPP;



		return mlx5_tc_ct_block_flow_offload_add(ft, f);

	case FLOW_CLS_DESTROY:

		return mlx5_tc_ct_block_flow_offload_del(ft, f);

drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c

+2 −2
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ static void mlx5_esw_offloads_pf_vf_devlink_port_attrs_set(struct mlx5_eswitch * 
	u16 pfnum;



	mlx5_esw_get_port_parent_id(dev, &ppid);

	pfnum = mlx5_get_dev_index(dev);

	pfnum = PCI_FUNC(dev->pdev->devfn);

	external = mlx5_core_is_ecpf_esw_manager(dev);

	if (external)

		controller_num = dev->priv.eswitch->offloads.host_number + 1;
@@ -110,7 +110,7 @@ static void mlx5_esw_offloads_sf_devlink_port_attrs_set(struct mlx5_eswitch *esw 
	struct netdev_phys_item_id ppid = {};

	u16 pfnum;



	pfnum = mlx5_get_dev_index(dev);

	pfnum = PCI_FUNC(dev->pdev->devfn);

	mlx5_esw_get_port_parent_id(dev, &ppid);

	memcpy(dl_port->attrs.switch_id.id, &ppid.id[0], ppid.id_len);

	dl_port->attrs.switch_id.id_len = ppid.id_len;

drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c

+9 −6
Original line number Diff line number Diff line
@@ -345,15 +345,12 @@ static void mlx5_fw_live_patch_event(struct work_struct *work) 
}



#if IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)

static int mlx5_check_hotplug_interrupt(struct mlx5_core_dev *dev)

static int mlx5_check_hotplug_interrupt(struct mlx5_core_dev *dev,

					struct pci_dev *bridge)

{

	struct pci_dev *bridge = dev->pdev->bus->self;

	u16 reg16;

	int err;



	if (!bridge)

		return -EOPNOTSUPP;



	err = pcie_capability_read_word(bridge, PCI_EXP_SLTCTL, &reg16);

	if (err)

		return err;
@@ -416,9 +413,15 @@ static int mlx5_check_dev_ids(struct mlx5_core_dev *dev, u16 dev_id) 
static bool mlx5_is_reset_now_capable(struct mlx5_core_dev *dev,

				      u8 reset_method)

{

	struct pci_dev *bridge = dev->pdev->bus->self;

	u16 dev_id;

	int err;



	if (!bridge) {

		mlx5_core_warn(dev, "PCI bus bridge is not accessible\n");

		return false;

	}



	if (!MLX5_CAP_GEN(dev, fast_teardown)) {

		mlx5_core_warn(dev, "fast teardown is not supported by firmware\n");

		return false;
@@ -426,7 +429,7 @@ static bool mlx5_is_reset_now_capable(struct mlx5_core_dev *dev, 


#if IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)

	if (reset_method != MLX5_MFRL_REG_PCI_RESET_METHOD_HOT_RESET) {

		err = mlx5_check_hotplug_interrupt(dev);

		err = mlx5_check_hotplug_interrupt(dev, bridge);

		if (err)

			return false;

	}

drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c

+9 −29
Original line number Diff line number Diff line
@@ -583,7 +583,8 @@ void mlx5_modify_lag(struct mlx5_lag *ldev, 
	}

}



static int mlx5_lag_set_port_sel_mode_roce(struct mlx5_lag *ldev,

static int mlx5_lag_set_port_sel_mode(struct mlx5_lag *ldev,

				      enum mlx5_lag_mode mode,

				      unsigned long *flags)

{

	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
@@ -592,7 +593,12 @@ static int mlx5_lag_set_port_sel_mode_roce(struct mlx5_lag *ldev, 
	if (first_idx < 0)

		return -EINVAL;



	if (mode == MLX5_LAG_MODE_MPESW ||

	    mode == MLX5_LAG_MODE_MULTIPATH)

		return 0;



	dev0 = ldev->pf[first_idx].dev;



	if (!MLX5_CAP_PORT_SELECTION(dev0, port_select_flow_table)) {

		if (ldev->ports > 2)

			return -EINVAL;
@@ -607,32 +613,10 @@ static int mlx5_lag_set_port_sel_mode_roce(struct mlx5_lag *ldev, 
	return 0;

}



static void mlx5_lag_set_port_sel_mode_offloads(struct mlx5_lag *ldev,

						struct lag_tracker *tracker,

						enum mlx5_lag_mode mode,

						unsigned long *flags)

{

	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);

	struct lag_func *dev0;



	if (first_idx < 0 || mode == MLX5_LAG_MODE_MPESW)

		return;



	dev0 = &ldev->pf[first_idx];

	if (MLX5_CAP_PORT_SELECTION(dev0->dev, port_select_flow_table) &&

	    tracker->tx_type == NETDEV_LAG_TX_TYPE_HASH) {

		if (ldev->ports > 2)

			ldev->buckets = MLX5_LAG_MAX_HASH_BUCKETS;

		set_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, flags);

	}

}



static int mlx5_lag_set_flags(struct mlx5_lag *ldev, enum mlx5_lag_mode mode,

			      struct lag_tracker *tracker, bool shared_fdb,

			      unsigned long *flags)

{

	bool roce_lag = mode == MLX5_LAG_MODE_ROCE;



	*flags = 0;

	if (shared_fdb) {

		set_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, flags);
@@ -642,11 +626,7 @@ static int mlx5_lag_set_flags(struct mlx5_lag *ldev, enum mlx5_lag_mode mode, 
	if (mode == MLX5_LAG_MODE_MPESW)

		set_bit(MLX5_LAG_MODE_FLAG_FDB_SEL_MODE_NATIVE, flags);



	if (roce_lag)

		return mlx5_lag_set_port_sel_mode_roce(ldev, flags);



	mlx5_lag_set_port_sel_mode_offloads(ldev, tracker, mode, flags);

	return 0;

	return mlx5_lag_set_port_sel_mode(ldev, mode, flags);

}



char *mlx5_get_str_port_sel_mode(enum mlx5_lag_mode mode, unsigned long flags)