Commit 4a58aac5 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'iio-fixes-for-6.17b' of... 

Merge tag 'iio-fixes-for-6.17b' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next

Jonathan writes:

IIO: 2nd set of fixes for the 6.17 cycle (or 6.18 merge window)

adi,ad5360
- Use a signed int type to be able to hold a potential error return.
adi,ad5421
- Use a signed int type to be able to hold a potential error return.
adi,adf4350
- Ensure rules on VCO frequency and prescaler values are met.
- Fix a wrong offset for the clock divisor control field.
xilinx,ams
- Unmask alarms correctly if an event is disabled and re-enabled.
- Fix a wrong register field mask.

* tag 'iio-fixes-for-6.17b' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio:
  iio: dac: ad5421: use int type to store negative error codes
  iio: dac: ad5360: use int type to store negative error codes
  iio: frequency: adf4350: Fix ADF4350_REG3_12BIT_CLKDIV_MODE
  iio: frequency: adf4350: Fix prescaler usage.
  iio: xilinx-ams: Fix AMS_ALARM_THR_DIRECT_MASK
  iio: xilinx-ams: Unmask interrupts after updating alarms
  iio/adc/pac1934: fix channel disable configuration
parents ef509269 3379c900

drivers/iio/adc/pac1934.c

+18 −2
Original line number Diff line number Diff line
@@ -88,6 +88,7 @@ 
#define PAC1934_VPOWER_3_ADDR			0x19

#define PAC1934_VPOWER_4_ADDR			0x1A

#define PAC1934_REFRESH_V_REG_ADDR		0x1F

#define PAC1934_SLOW_REG_ADDR			0x20

#define PAC1934_CTRL_STAT_REGS_ADDR		0x1C

#define PAC1934_PID_REG_ADDR			0xFD

#define PAC1934_MID_REG_ADDR			0xFE
@@ -1265,8 +1266,23 @@ static int pac1934_chip_configure(struct pac1934_chip_info *info) 
	/* no SLOW triggered REFRESH, clear POR */

	regs[PAC1934_SLOW_REG_OFF] = 0;



	ret =  i2c_smbus_write_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR,

					  ARRAY_SIZE(regs), (u8 *)regs);

	/*

	 * Write the three bytes sequentially, as the device does not support

	 * block write.

	 */

	ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_STAT_REGS_ADDR,

					regs[PAC1934_CHANNEL_DIS_REG_OFF]);

	if (ret)

		return ret;



	ret = i2c_smbus_write_byte_data(client,

					PAC1934_CTRL_STAT_REGS_ADDR + PAC1934_NEG_PWR_REG_OFF,

					regs[PAC1934_NEG_PWR_REG_OFF]);

	if (ret)

		return ret;



	ret = i2c_smbus_write_byte_data(client, PAC1934_SLOW_REG_ADDR,

					regs[PAC1934_SLOW_REG_OFF]);

	if (ret)

		return ret;

drivers/iio/adc/xilinx-ams.c

+26 −21
Original line number Diff line number Diff line
@@ -118,7 +118,7 @@ 
#define AMS_ALARM_THRESHOLD_OFF_10	0x10

#define AMS_ALARM_THRESHOLD_OFF_20	0x20



#define AMS_ALARM_THR_DIRECT_MASK	BIT(1)

#define AMS_ALARM_THR_DIRECT_MASK	BIT(0)

#define AMS_ALARM_THR_MIN		0x0000

#define AMS_ALARM_THR_MAX		(BIT(16) - 1)
@@ -389,6 +389,29 @@ static void ams_update_pl_alarm(struct ams *ams, unsigned long alarm_mask) 
	ams_pl_update_reg(ams, AMS_REG_CONFIG3, AMS_REGCFG3_ALARM_MASK, cfg);

}



static void ams_unmask(struct ams *ams)

{

	unsigned int status, unmask;



	status = readl(ams->base + AMS_ISR_0);



	/* Clear those bits which are not active anymore */

	unmask = (ams->current_masked_alarm ^ status) & ams->current_masked_alarm;



	/* Clear status of disabled alarm */

	unmask |= ams->intr_mask;



	ams->current_masked_alarm &= status;



	/* Also clear those which are masked out anyway */

	ams->current_masked_alarm &= ~ams->intr_mask;



	/* Clear the interrupts before we unmask them */

	writel(unmask, ams->base + AMS_ISR_0);



	ams_update_intrmask(ams, ~AMS_ALARM_MASK, ~AMS_ALARM_MASK);

}



static void ams_update_alarm(struct ams *ams, unsigned long alarm_mask)

{

	unsigned long flags;
@@ -401,6 +424,7 @@ static void ams_update_alarm(struct ams *ams, unsigned long alarm_mask) 


	spin_lock_irqsave(&ams->intr_lock, flags);

	ams_update_intrmask(ams, AMS_ISR0_ALARM_MASK, ~alarm_mask);

	ams_unmask(ams);

	spin_unlock_irqrestore(&ams->intr_lock, flags);

}
@@ -1035,28 +1059,9 @@ static void ams_handle_events(struct iio_dev *indio_dev, unsigned long events) 
static void ams_unmask_worker(struct work_struct *work)

{

	struct ams *ams = container_of(work, struct ams, ams_unmask_work.work);

	unsigned int status, unmask;



	spin_lock_irq(&ams->intr_lock);



	status = readl(ams->base + AMS_ISR_0);



	/* Clear those bits which are not active anymore */

	unmask = (ams->current_masked_alarm ^ status) & ams->current_masked_alarm;



	/* Clear status of disabled alarm */

	unmask |= ams->intr_mask;



	ams->current_masked_alarm &= status;



	/* Also clear those which are masked out anyway */

	ams->current_masked_alarm &= ~ams->intr_mask;



	/* Clear the interrupts before we unmask them */

	writel(unmask, ams->base + AMS_ISR_0);



	ams_update_intrmask(ams, ~AMS_ALARM_MASK, ~AMS_ALARM_MASK);



	ams_unmask(ams);

	spin_unlock_irq(&ams->intr_lock);



	/* If still pending some alarm re-trigger the timer */

drivers/iio/dac/ad5360.c

+1 −1
Original line number Diff line number Diff line
@@ -262,7 +262,7 @@ static int ad5360_update_ctrl(struct iio_dev *indio_dev, unsigned int set, 
	unsigned int clr)

{

	struct ad5360_state *st = iio_priv(indio_dev);

	unsigned int ret;

	int ret;



	mutex_lock(&st->lock);

drivers/iio/dac/ad5421.c

+1 −1
Original line number Diff line number Diff line
@@ -186,7 +186,7 @@ static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set, 
	unsigned int clr)

{

	struct ad5421_state *st = iio_priv(indio_dev);

	unsigned int ret;

	int ret;



	mutex_lock(&st->lock);

drivers/iio/frequency/adf4350.c

+13 −7
Original line number Diff line number Diff line
@@ -149,6 +149,19 @@ static int adf4350_set_freq(struct adf4350_state *st, unsigned long long freq) 
	if (freq > ADF4350_MAX_OUT_FREQ || freq < st->min_out_freq)

		return -EINVAL;



	st->r4_rf_div_sel = 0;



	/*

	 * !\TODO: The below computation is making sure we get a power of 2

	 * shift (st->r4_rf_div_sel) so that freq becomes higher or equal to

	 * ADF4350_MIN_VCO_FREQ. This might be simplified with fls()/fls_long()

	 * and friends.

	 */

	while (freq < ADF4350_MIN_VCO_FREQ) {

		freq <<= 1;

		st->r4_rf_div_sel++;

	}



	if (freq > ADF4350_MAX_FREQ_45_PRESC) {

		prescaler = ADF4350_REG1_PRESCALER;

		mdiv = 75;
@@ -157,13 +170,6 @@ static int adf4350_set_freq(struct adf4350_state *st, unsigned long long freq) 
		mdiv = 23;

	}



	st->r4_rf_div_sel = 0;



	while (freq < ADF4350_MIN_VCO_FREQ) {

		freq <<= 1;

		st->r4_rf_div_sel++;

	}



	/*

	 * Allow a predefined reference division factor

	 * if not set, compute our own