Commit 4a5f2dd1 authored by Tony Luck's avatar Tony Luck Committed by Borislav Petkov (AMD)
Browse files

x86/mce: Switch to new Intel CPU model defines 

New CPU #defines encode vendor and family as well as model.

  [ bp: Squash *three* mce patches into one, fold in fix:
    https://lore.kernel.org/r/20240429022051.63360-1-tony.luck@intel.com

 ]

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181511.41772-1-tony.luck%40intel.com
parent c73cd372

arch/x86/kernel/cpu/mce/core.c

+3 −3
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ 
#include <linux/kexec.h>



#include <asm/fred.h>

#include <asm/intel-family.h>

#include <asm/cpu_device_id.h>

#include <asm/processor.h>

#include <asm/traps.h>

#include <asm/tlbflush.h>
@@ -1948,14 +1948,14 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c) 
		if (c->x86 == 6 && c->x86_model <= 13 && cfg->bootlog < 0)

			cfg->bootlog = 0;



		if (c->x86 == 6 && c->x86_model == 45)

		if (c->x86_vfm == INTEL_SANDYBRIDGE_X)

			mce_flags.snb_ifu_quirk = 1;



		/*

		 * Skylake, Cascacde Lake and Cooper Lake require a quirk on

		 * rep movs.

		 */

		if (c->x86 == 6 && c->x86_model == INTEL_FAM6_SKYLAKE_X)

		if (c->x86_vfm == INTEL_SKYLAKE_X)

			mce_flags.skx_repmov_quirk = 1;

	}

arch/x86/kernel/cpu/mce/intel.c

+10 −11
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ 
#include <linux/cpumask.h>

#include <asm/apic.h>

#include <asm/cpufeature.h>

#include <asm/intel-family.h>

#include <asm/cpu_device_id.h>

#include <asm/processor.h>

#include <asm/msr.h>

#include <asm/mce.h>
@@ -455,10 +455,10 @@ static void intel_imc_init(struct cpuinfo_x86 *c) 
{

	u64 error_control;



	switch (c->x86_model) {

	case INTEL_FAM6_SANDYBRIDGE_X:

	case INTEL_FAM6_IVYBRIDGE_X:

	case INTEL_FAM6_HASWELL_X:

	switch (c->x86_vfm) {

	case INTEL_SANDYBRIDGE_X:

	case INTEL_IVYBRIDGE_X:

	case INTEL_HASWELL_X:

		if (rdmsrl_safe(MSR_ERROR_CONTROL, &error_control))

			return;

		error_control |= 2;
@@ -484,12 +484,11 @@ bool intel_filter_mce(struct mce *m) 
	struct cpuinfo_x86 *c = &boot_cpu_data;



	/* MCE errata HSD131, HSM142, HSW131, BDM48, HSM142 and SKX37 */

	if ((c->x86 == 6) &&

	    ((c->x86_model == INTEL_FAM6_HASWELL) ||

	     (c->x86_model == INTEL_FAM6_HASWELL_L) ||

	     (c->x86_model == INTEL_FAM6_BROADWELL) ||

	     (c->x86_model == INTEL_FAM6_HASWELL_G) ||

	     (c->x86_model == INTEL_FAM6_SKYLAKE_X)) &&

	if ((c->x86_vfm == INTEL_HASWELL ||

	     c->x86_vfm == INTEL_HASWELL_L ||

	     c->x86_vfm == INTEL_BROADWELL ||

	     c->x86_vfm == INTEL_HASWELL_G ||

	     c->x86_vfm == INTEL_SKYLAKE_X) &&

	    (m->bank == 0) &&

	    ((m->status & 0xa0000000ffffffff) == 0x80000000000f0005))

		return true;

arch/x86/kernel/cpu/mce/severity.c

+5 −5
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ 
#include <linux/uaccess.h>



#include <asm/mce.h>

#include <asm/intel-family.h>

#include <asm/cpu_device_id.h>

#include <asm/traps.h>

#include <asm/insn.h>

#include <asm/insn-eval.h>
@@ -45,14 +45,14 @@ static struct severity { 
	unsigned char context;

	unsigned char excp;

	unsigned char covered;

	unsigned char cpu_model;

	unsigned int cpu_vfm;

	unsigned char cpu_minstepping;

	unsigned char bank_lo, bank_hi;

	char *msg;

} severities[] = {

#define MCESEV(s, m, c...) { .sev = MCE_ ## s ## _SEVERITY, .msg = m, ## c }

#define BANK_RANGE(l, h) .bank_lo = l, .bank_hi = h

#define MODEL_STEPPING(m, s) .cpu_model = m, .cpu_minstepping = s

#define VFM_STEPPING(m, s) .cpu_vfm = m, .cpu_minstepping = s

#define  KERNEL		.context = IN_KERNEL

#define  USER		.context = IN_USER

#define  KERNEL_RECOV	.context = IN_KERNEL_RECOV
@@ -128,7 +128,7 @@ static struct severity { 
	MCESEV(

		AO, "Uncorrected Patrol Scrub Error",

		SER, MASK(MCI_STATUS_UC|MCI_ADDR|0xffffeff0, MCI_ADDR|0x001000c0),

		MODEL_STEPPING(INTEL_FAM6_SKYLAKE_X, 4), BANK_RANGE(13, 18)

		VFM_STEPPING(INTEL_SKYLAKE_X, 4), BANK_RANGE(13, 18)

	),



	/* ignore OVER for UCNA */
@@ -398,7 +398,7 @@ static noinstr int mce_severity_intel(struct mce *m, struct pt_regs *regs, char 
			continue;

		if (s->excp && excp != s->excp)

			continue;

		if (s->cpu_model && boot_cpu_data.x86_model != s->cpu_model)

		if (s->cpu_vfm && boot_cpu_data.x86_vfm != s->cpu_vfm)

			continue;

		if (s->cpu_minstepping && boot_cpu_data.x86_stepping < s->cpu_minstepping)

			continue;