Commit 4abae5b6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'gpio-updates-for-v6.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux 

Pull gpio updates from Bartosz Golaszewski:
 "Thanks to little activity in December, this is really tiny. Just a few
  updates to drivers and device-tree bindings.

  Driver improvements:
   - support a new model in gpio-mpc8xxx
   - refactor gpio-tqmx86 and add support for direction setting
   - allow building gpio-omap with COMPILE_TEST=y
   - use gpiochip_get_data() instead of dev_get_drvdata() in
     gpio-twl6040
   - drop unued field from driver data in gpio-altera
   - use generic request/free callbacks in gpio-regmap for better
     integration with pinctrl
   - use dev_err_probe() where applicable in gpio-pca953x
   - use existing dedicated GPIO defines in gpio-tps65219 instead of
     custom ones

  DT bindings:
   - document a new model in fsl,qoriq-gpio
   - explain the chip's latch clock pin and how it works like
     chip-select in fairchild,74hc595
   - enable the gpio-line-names property for gpio-brcmstb"

* tag 'gpio-updates-for-v6.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  gpio: regmap: Use generic request/free ops
  gpio: altera: Drop .mapped_irq from driver data
  gpio: mpc8xxx: Add MPC8314 support
  dt-bindings: gpio: fsl,qoriq-gpio: Add compatible string fsl,mpc8314-gpio
  dt-bindings: gpio: fairchild,74hc595: Document chip select vs. latch clock
  gpio: tps65219: Use existing kernel gpio macros
  gpio: pca953x: log an error when failing to get the reset GPIO
  dt-bindings: gpio: brcmstb: permit gpio-line-names property
  gpio: tqmx86: add support for changing GPIO directions
  gpio: tqmx86: introduce tqmx86_gpio_clrsetbits() helper
  gpio: tqmx86: use cleanup guards for spinlock
  gpio: tqmx86: consistently refer to IRQs by hwirq numbers
  gpio: tqmx86: add macros for interrupt configuration
  gpio: omap: allow building the module with COMPILE_TEST=y
  gpio: twl4030: use gpiochip_get_data
parents 0ad9617c b0fa00fe

Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml

+4 −0
Original line number Diff line number Diff line
@@ -64,6 +64,10 @@ properties: 


  gpio-ranges: true



  gpio-line-names:

    minItems: 1

    maxItems: 128



  wakeup-source:

    type: boolean

    description: >

Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml

+17 −0
Original line number Diff line number Diff line
@@ -6,6 +6,23 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# 


title: Generic 8-bit shift register



description: |

  NOTE: These chips nominally don't have a chip select pin. They do however

  have a rising-edge triggered latch clock (or storage register clock) pin,

  which behaves like an active-low chip select.



  After the bits are shifted into the shift register, CS# is driven high, which

  the 74HC595 sees as a rising edge on the latch clock that results in a

  transfer of the bits from the shift register to the storage register and thus

  to the output pins.

                      _   _       _   _

  shift clock    ____| |_| |_..._| |_| |_________



  latch clock                           * trigger

                 ___                     ________

  chip select#      |___________________|





maintainers:

  - Maxime Ripard <mripard@kernel.org>

Documentation/devicetree/bindings/gpio/fsl,qoriq-gpio.yaml

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ properties: 
      - enum:

          - fsl,mpc5121-gpio

          - fsl,mpc5125-gpio

          - fsl,mpc8314-gpio

          - fsl,mpc8349-gpio

          - fsl,mpc8572-gpio

          - fsl,mpc8610-gpio

drivers/gpio/Kconfig

+2 −2
Original line number Diff line number Diff line
@@ -529,9 +529,9 @@ config GPIO_OCTEON 
	  family of SOCs.



config GPIO_OMAP

	tristate "TI OMAP GPIO support" if ARCH_OMAP2PLUS || COMPILE_TEST

	tristate "TI OMAP GPIO support"

	depends on ARCH_OMAP || COMPILE_TEST

	default y if ARCH_OMAP

	depends on ARM

	select GENERIC_IRQ_CHIP

	select GPIOLIB_IRQCHIP

	help

drivers/gpio/gpio-altera.c

+4 −5
Original line number Diff line number Diff line
@@ -32,14 +32,12 @@ 
*			  will be blocked until the current one completes.

* @interrupt_trigger	: specifies the hardware configured IRQ trigger type

*			  (rising, falling, both, high)

* @mapped_irq		: kernel mapped irq number.

*/

struct altera_gpio_chip {

	struct gpio_chip gc;

	void __iomem *regs;

	raw_spinlock_t gpio_lock;

	int interrupt_trigger;

	int mapped_irq;

};



static void altera_gpio_irq_unmask(struct irq_data *d)
@@ -235,6 +233,7 @@ static int altera_gpio_probe(struct platform_device *pdev) 
	int reg, ret;

	struct altera_gpio_chip *altera_gc;

	struct gpio_irq_chip *girq;

	int mapped_irq;



	altera_gc = devm_kzalloc(&pdev->dev, sizeof(*altera_gc), GFP_KERNEL);

	if (!altera_gc)
@@ -271,8 +270,8 @@ static int altera_gpio_probe(struct platform_device *pdev) 
	if (IS_ERR(altera_gc->regs))

		return dev_err_probe(dev, PTR_ERR(altera_gc->regs), "failed to ioremap memory resource\n");



	altera_gc->mapped_irq = platform_get_irq_optional(pdev, 0);

	if (altera_gc->mapped_irq < 0)

	mapped_irq = platform_get_irq_optional(pdev, 0);

	if (mapped_irq < 0)

		goto skip_irq;



	if (device_property_read_u32(dev, "altr,interrupt-type", &reg)) {
@@ -296,7 +295,7 @@ static int altera_gpio_probe(struct platform_device *pdev) 
		return -ENOMEM;

	girq->default_type = IRQ_TYPE_NONE;

	girq->handler = handle_bad_irq;

	girq->parents[0] = altera_gc->mapped_irq;

	girq->parents[0] = mapped_irq;



skip_irq:

	ret = devm_gpiochip_add_data(dev, &altera_gc->gc, altera_gc);