Commit 4aca7e92 authored by Chuan Liu's avatar Chuan Liu Committed by Jerome Brunet
Browse files

clk: amlogic: remove potentially unsafe flags from S4 video clocks



The video clocks enci, encp, vdac and hdmitx share the same clock
source. Adding CLK_SET_RATE_PARENT to the mux may unintentionally change
the shared parent clock, which could affect other video clocks.

Signed-off-by: default avatarChuan Liu <chuan.liu@amlogic.com>
Link: https://lore.kernel.org/r/20250919-add_video_clk-v6-3-fe223161fb3f@amlogic.com


Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent c78c9dbe
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+0 −4
Original line number Diff line number Diff line
@@ -1107,7 +1107,6 @@ static struct clk_regmap s4_cts_enci_sel = {
		.ops = &clk_regmap_mux_ops,
		.parent_hws = s4_cts_parents,
		.num_parents = ARRAY_SIZE(s4_cts_parents),
		.flags = CLK_SET_RATE_PARENT,
	},
};

@@ -1123,7 +1122,6 @@ static struct clk_regmap s4_cts_encp_sel = {
		.ops = &clk_regmap_mux_ops,
		.parent_hws = s4_cts_parents,
		.num_parents = ARRAY_SIZE(s4_cts_parents),
		.flags = CLK_SET_RATE_PARENT,
	},
};

@@ -1154,7 +1152,6 @@ static struct clk_regmap s4_cts_vdac_sel = {
		.ops = &clk_regmap_mux_ops,
		.parent_hws = s4_cts_parents,
		.num_parents = ARRAY_SIZE(s4_cts_parents),
		.flags = CLK_SET_RATE_PARENT,
	},
};

@@ -1185,7 +1182,6 @@ static struct clk_regmap s4_hdmi_tx_sel = {
		.ops = &clk_regmap_mux_ops,
		.parent_hws = s4_hdmi_tx_parents,
		.num_parents = ARRAY_SIZE(s4_hdmi_tx_parents),
		.flags = CLK_SET_RATE_PARENT,
	},
};