Commit 4af692f6 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: add get_allowed_info_register for SI 



Registers that can be fetched from the info ioctl.

Tested-by: default avatarMarek Olšák <marek.olsak@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e66582f9

drivers/gpu/drm/radeon/radeon_asic.c

+1 −0
Original line number Diff line number Diff line
@@ -1908,6 +1908,7 @@ static struct radeon_asic si_asic = { 
	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,

	.get_xclk = &si_get_xclk,

	.get_gpu_clock_counter = &si_get_gpu_clock_counter,

	.get_allowed_info_register = si_get_allowed_info_register,

	.gart = {

		.tlb_flush = &si_pcie_gart_tlb_flush,

		.get_page_entry = &rs600_gart_get_page_entry,

drivers/gpu/drm/radeon/radeon_asic.h

+2 −0
Original line number Diff line number Diff line
@@ -746,6 +746,8 @@ u32 si_get_xclk(struct radeon_device *rdev); 
uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev);

int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);

int si_get_temp(struct radeon_device *rdev);

int si_get_allowed_info_register(struct radeon_device *rdev,

				 u32 reg, u32 *val);

int si_dpm_init(struct radeon_device *rdev);

void si_dpm_setup_asic(struct radeon_device *rdev);

int si_dpm_enable(struct radeon_device *rdev);

drivers/gpu/drm/radeon/si.c

+30 −0
Original line number Diff line number Diff line
@@ -1264,6 +1264,36 @@ static void si_init_golden_registers(struct radeon_device *rdev) 
	}

}



/**

 * si_get_allowed_info_register - fetch the register for the info ioctl

 *

 * @rdev: radeon_device pointer

 * @reg: register offset in bytes

 * @val: register value

 *

 * Returns 0 for success or -EINVAL for an invalid register

 *

 */

int si_get_allowed_info_register(struct radeon_device *rdev,

				 u32 reg, u32 *val)

{

	switch (reg) {

	case GRBM_STATUS:

	case GRBM_STATUS2:

	case GRBM_STATUS_SE0:

	case GRBM_STATUS_SE1:

	case SRBM_STATUS:

	case SRBM_STATUS2:

	case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):

	case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET):

	case UVD_STATUS:

		*val = RREG32(reg);

		return 0;

	default:

		return -EINVAL;

	}

}



#define PCIE_BUS_CLK                10000

#define TCLK                        (PCIE_BUS_CLK / 10)

drivers/gpu/drm/radeon/sid.h

+1 −0
Original line number Diff line number Diff line
@@ -1556,6 +1556,7 @@ 
#define UVD_UDEC_DBW_ADDR_CONFIG			0xEF54

#define UVD_RBC_RB_RPTR					0xF690

#define UVD_RBC_RB_WPTR					0xF694

#define UVD_STATUS					0xf6bc



#define	UVD_CGC_CTRL					0xF4B0

#	define DCM					(1 << 0)