Commit 4b1c24ef authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.17-2025-08-28' of... 

Merge tag 'amd-drm-fixes-6.17-2025-08-28' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.17-2025-08-28:

amdgpu:
- UserQ fixes
- Revert CSA fix
- SR-IOV fix

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20250828173904.75850-1-alexander.deucher@amd.com
parents 60d98e1a c767d74a

drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c

+2 −2
Original line number Diff line number Diff line
@@ -88,8 +88,8 @@ int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm, 
	}



	r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size,

			     AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE |

			     AMDGPU_VM_PAGE_EXECUTABLE);

			     AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |

			     AMDGPU_PTE_EXECUTABLE);



	if (r) {

		DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c

+1 −0
Original line number Diff line number Diff line
@@ -471,6 +471,7 @@ amdgpu_userq_create(struct drm_file *filp, union drm_amdgpu_userq *args) 
	if (index == (uint64_t)-EINVAL) {

		drm_file_err(uq_mgr->file, "Failed to get doorbell for queue\n");

		kfree(queue);

		r = -EINVAL;

		goto unlock;

	}

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

+9 −5
Original line number Diff line number Diff line
@@ -1612,9 +1612,9 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block) 
	case IP_VERSION(11, 0, 2):

	case IP_VERSION(11, 0, 3):

		if (!adev->gfx.disable_uq &&

		    adev->gfx.me_fw_version  >= 2390 &&

		    adev->gfx.pfp_fw_version >= 2530 &&

		    adev->gfx.mec_fw_version >= 2600 &&

		    adev->gfx.me_fw_version  >= 2420 &&

		    adev->gfx.pfp_fw_version >= 2580 &&

		    adev->gfx.mec_fw_version >= 2650 &&

		    adev->mes.fw_version[0] >= 120) {

			adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs;

			adev->userq_funcs[AMDGPU_HW_IP_COMPUTE] = &userq_mes_funcs;
@@ -4129,6 +4129,8 @@ static int gfx_v11_0_gfx_mqd_init(struct amdgpu_device *adev, void *m, 
#endif

	if (prop->tmz_queue)

		tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, TMZ_MATCH, 1);

	if (!prop->kernel_queue)

		tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_NON_PRIV, 1);

	mqd->cp_gfx_hqd_cntl = tmp;



	/* set up cp_doorbell_control */
@@ -4281,8 +4283,10 @@ static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m, 
	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 1);

	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH,

			    prop->allow_tunneling);

	if (prop->kernel_queue) {

		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);

		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);

	}

	if (prop->tmz_queue)

		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TMZ, 1);

	mqd->cp_hqd_pq_control = tmp;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

+6 −2
Original line number Diff line number Diff line
@@ -3026,6 +3026,8 @@ static int gfx_v12_0_gfx_mqd_init(struct amdgpu_device *adev, void *m, 
#endif

	if (prop->tmz_queue)

		tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, TMZ_MATCH, 1);

	if (!prop->kernel_queue)

		tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_NON_PRIV, 1);

	mqd->cp_gfx_hqd_cntl = tmp;



	/* set up cp_doorbell_control */
@@ -3175,8 +3177,10 @@ static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m, 
			    (order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 1);

	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH, 0);

	if (prop->kernel_queue) {

		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);

		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);

	}

	if (prop->tmz_queue)

		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TMZ, 1);

	mqd->cp_hqd_pq_control = tmp;

drivers/gpu/drm/amd/pm/amdgpu_pm.c

+10 −8
Original line number Diff line number Diff line
@@ -3458,14 +3458,16 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj, 
		effective_mode &= ~S_IWUSR;



	/* not implemented yet for APUs other than GC 10.3.1 (vangogh) and 9.4.3 */

	if (((adev->family == AMDGPU_FAMILY_SI) ||

	     ((adev->flags & AMD_IS_APU) && (gc_ver != IP_VERSION(10, 3, 1)) &&

	      (gc_ver != IP_VERSION(9, 4, 3) && gc_ver != IP_VERSION(9, 4, 4)))) &&

	    (attr == &sensor_dev_attr_power1_cap_max.dev_attr.attr ||

	if (attr == &sensor_dev_attr_power1_cap_max.dev_attr.attr ||

	    attr == &sensor_dev_attr_power1_cap_min.dev_attr.attr ||

	    attr == &sensor_dev_attr_power1_cap.dev_attr.attr ||

	     attr == &sensor_dev_attr_power1_cap_default.dev_attr.attr))

	    attr == &sensor_dev_attr_power1_cap_default.dev_attr.attr) {

		if (adev->family == AMDGPU_FAMILY_SI ||

		    ((adev->flags & AMD_IS_APU) && gc_ver != IP_VERSION(10, 3, 1) &&

		     (gc_ver != IP_VERSION(9, 4, 3) && gc_ver != IP_VERSION(9, 4, 4))) ||

		    (amdgpu_sriov_vf(adev) && gc_ver == IP_VERSION(11, 0, 3)))

			return 0;

	}



	/* not implemented yet for APUs having < GC 9.3.0 (Renoir) */

	if (((adev->family == AMDGPU_FAMILY_SI) ||