Commit 4b3dbd70 authored by Satya Priya Kakitapalli's avatar Satya Priya Kakitapalli Committed by Bjorn Andersson
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dt-bindings: clock: qcom,gcc-sm8150: Add gcc video resets for sm8150



Add gcc video axic, axi0 and axi1 resets for the global clock controller
on sm8150.

Signed-off-by: default avatarSatya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240111-sm8150-dfs-support-v2-2-6edb44c83d3b@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 2ff787e3
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+3 −0
Original line number Diff line number Diff line
@@ -239,6 +239,9 @@
#define GCC_USB30_PRIM_BCR					26
#define GCC_USB30_SEC_BCR					27
#define GCC_USB_PHY_CFG_AHB2PHY_BCR				28
#define GCC_VIDEO_AXIC_CLK_BCR					29
#define GCC_VIDEO_AXI0_CLK_BCR					30
#define GCC_VIDEO_AXI1_CLK_BCR					31

/* GCC GDSCRs */
#define PCIE_0_GDSC						0