Commit 4b6ec94f authored by Mario Limonciello's avatar Mario Limonciello Committed by Alex Deucher
Browse files

drm/amd: Drop calls to restore power limit and clock from smu_resume() 



User requested power limits and clock settings are already restored as
part of smu_restore_dpm_user_profile(). It's unnecessary to call the
same restore as part of smu_resume().

Revert the following commits to drop that extra restore:
commit ed4efe42 ("drm/amd: Restore cached power limit during resume")
commit 796ff8a7 ("drm/amd: Restore cached manual clock settings during resume")
commit f9b80514 ("drm/amd: Only restore cached manual clock settings in restore if OD enabled")

Suggested-by: default avatarLijo Lazar <Lijo.Lazar@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 72ea12f6

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

+0 −13
Original line number Diff line number Diff line
@@ -2239,7 +2239,6 @@ static int smu_resume(struct amdgpu_ip_block *ip_block) 
	int ret;

	struct amdgpu_device *adev = ip_block->adev;

	struct smu_context *smu = adev->powerplay.pp_handle;

	struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);



	if (amdgpu_sriov_multi_vf_mode(adev))

		return 0;
@@ -2271,18 +2270,6 @@ static int smu_resume(struct amdgpu_ip_block *ip_block) 


	adev->pm.dpm_enabled = true;



	if (smu->current_power_limit) {

		ret = smu_set_power_limit(smu, SMU_DEFAULT_PPT_LIMIT, smu->current_power_limit);

		if (ret && ret != -EOPNOTSUPP)

			return ret;

	}



	if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL && smu->od_enabled) {

		ret = smu_od_edit_dpm_table(smu, PP_OD_COMMIT_DPM_TABLE, NULL, 0);

		if (ret)

			return ret;

	}



	dev_info(adev->dev, "SMU is resumed successfully!\n");



	return 0;