Commit 4b82e1f8 authored by Adrien Grassein's avatar Adrien Grassein Committed by Shawn Guo
Browse files

arm64: dts: imx8mq-nitrogen: add lt8912 MIPI-DSI to HDMI 



Add support of the lt8912b in the DTB.
This adds the support of the DB_DSIHD daugther board from
Boundary Devices.

Signed-off-by: default avatarAdrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 4a085de2

arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts

+121 −0
Original line number Diff line number Diff line
@@ -34,6 +34,19 @@ power { 
		};

	};



	hdmi-connector {

		compatible = "hdmi-connector";

		ddc-i2c-bus = <&ddc_i2c_bus>;

		label = "hdmi";

		type = "a";



		port {

			hdmi_connector_in: endpoint {

				remote-endpoint = <&lt8912_out>;

			};

		};

	};



	reg_usb_otg_vbus: regulator-usb-otg-vbus {

		compatible = "regulator-fixed";

		pinctrl-names = "default";
@@ -81,6 +94,9 @@ reg_vref_5v: regulator-vref-5v { 
	};

};



&dphy {

	status = "okay";

};



&fec1 {

	pinctrl-names = "default";
@@ -194,6 +210,98 @@ rtc@68 { 
	};

};



&i2c4 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c4>;

	status = "okay";



	pca9546: i2cmux@70 {

		compatible = "nxp,pca9546";

		reg = <0x70>;

		#address-cells = <1>;

		#size-cells = <0>;



		i2c4@0 {

			reg = <0>;

			#address-cells = <1>;

			#size-cells = <0>;

			clock-frequency = <100000>;



			hdmi-bridge@48 {

				compatible = "lontium,lt8912b";

				reg = <0x48> ;

				reset-gpios = <&max7323 0 GPIO_ACTIVE_LOW>;



				ports {

					#address-cells = <1>;

					#size-cells = <0>;



					port@0 {

						reg = <0>;



						hdmi_out_in: endpoint {

							data-lanes = <1 2 3 4>;

							remote-endpoint = <&mipi_dsi_out>;

						};

					};



					port@1 {

						reg = <1>;



						lt8912_out: endpoint {

							remote-endpoint = <&hdmi_connector_in>;

						};

					};

				};

			};

		};



		ddc_i2c_bus: i2c4@1 {

			reg = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			clock-frequency = <100000>;

		};



		i2c4@3 {

			reg = <3>;

			#address-cells = <1>;

			#size-cells = <0>;

			clock-frequency = <100000>;



			max7323: gpio-expander@68 {

				compatible = "maxim,max7323";

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_max7323>;

				gpio-controller;

				reg = <0x68>;

				#gpio-cells = <2>;

			};

		};

	};

};



&lcdif {

	status = "okay";

};



&mipi_dsi {

	#address-cells = <1>;

	#size-cells = <0>;

	status = "okay";



	ports {

		port@1 {

			reg = <1>;



			mipi_dsi_out: endpoint {

				remote-endpoint = <&hdmi_out_in>;

			};

		};

	};

};



&uart1 { /* console */

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1>;
@@ -364,6 +472,19 @@ MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x49 
		>;

	};



	pinctrl_i2c4: i2c4grp {

		fsl,pins = <

			MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL			0x4000007f

			MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA			0x4000007f

		>;

	};



	pinctrl_max7323: max7323grp {

		fsl,pins = <

			MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15 0x19

		>;

	};



	pinctrl_reg_arm_dram: reg-arm-dramgrp {

		fsl,pins = <

			MX8MQ_IOMUXC_SAI5_RXD3_GPIO3_IO24	0x16