Commit 4bedc468 authored by Adam Ford's avatar Adam Ford Committed by Shawn Guo
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arm64: dts: imx8mp: Add NPU Node 



The NPU is based on the Vivante GC8000 and its power-domain
is controlled my pgc_mlmix.  Since the power-domain uses
some of these clocks, setup the clock parent and rates
inside the power-domain, and add the NPU node.

The data sheet states the CLK_ML_AHB should be 300MHz for
nominal, but 800MHz clock will divide down to 266 instead.
Boards which operate in over-drive mode should update the
clocks on their boards accordingly.  When the driver loads,
the NPU numerates as:

 etnaviv-gpu 38500000.npu: model: GC8000, revision: 8002

Signed-off-by: default avatarAdam Ford <aford173@gmail.com>
Reviewed-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 94920866

arch/arm64/boot/dts/freescale/imx8mp.dtsi

+21 −0
Original line number Diff line number Diff line
@@ -889,6 +889,15 @@ pgc_mlmix: power-domain@24 { 
						clocks = <&clk IMX8MP_CLK_ML_AXI>,

							 <&clk IMX8MP_CLK_ML_AHB>,

							 <&clk IMX8MP_CLK_NPU_ROOT>;

						assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,

								  <&clk IMX8MP_CLK_ML_AXI>,

								  <&clk IMX8MP_CLK_ML_AHB>;

						assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,

									 <&clk IMX8MP_SYS_PLL1_800M>,

									 <&clk IMX8MP_SYS_PLL1_800M>;

						assigned-clock-rates = <800000000>,

								       <800000000>,

								       <300000000>;

					};

				};

			};
@@ -2014,6 +2023,18 @@ vpumix_blk_ctrl: blk-ctrl@38330000 { 
			interconnect-names = "g1", "g2", "vc8000e";

		};



		npu: npu@38500000 {

			compatible = "vivante,gc";

			reg = <0x38500000 0x200000>;

			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk IMX8MP_CLK_NPU_ROOT>,

				 <&clk IMX8MP_CLK_NPU_ROOT>,

				 <&clk IMX8MP_CLK_ML_AXI>,

				 <&clk IMX8MP_CLK_ML_AHB>;

			clock-names = "core", "shader", "bus", "reg";

			power-domains = <&pgc_mlmix>;

		};



		gic: interrupt-controller@38800000 {

			compatible = "arm,gic-v3";

			reg = <0x38800000 0x10000>,