Commit 4bf8b462 authored by Rayyan Ansari's avatar Rayyan Ansari Committed by Vinod Koul
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dt-bindings: phy: qcom,sata-phy: convert to dtschema



Convert the bindings for the SATA PHY on both apq8064 and ipq806x from
the old text format to yaml.

Signed-off-by: default avatarRayyan Ansari <rayyan.ansari@linaro.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240715130854.53501-2-rayyan.ansari@linaro.org


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 8400291e
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/qcom,sata-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm SATA PHY Controller

maintainers:
  - Bjorn Andersson <andersson@kernel.org>
  - Konrad Dybcio <konrad.dybcio@linaro.org>

description:
  The Qualcomm SATA PHY describes on-chip SATA Physical layer controllers.

properties:
  compatible:
    enum:
      - qcom,ipq806x-sata-phy
      - qcom,apq8064-sata-phy

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    const: cfg

  '#phy-cells':
    const: 0

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - '#phy-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
    sata_phy: sata-phy@1b400000 {
        compatible = "qcom,ipq806x-sata-phy";
        reg = <0x1b400000 0x200>;

        clocks = <&gcc SATA_PHY_CFG_CLK>;
        clock-names = "cfg";

        #phy-cells = <0>;
    };
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Qualcomm APQ8064 SATA PHY Controller
------------------------------------

SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
Each SATA PHY controller should have its own node.

Required properties:
- compatible: compatible list, contains "qcom,apq8064-sata-phy".
- reg: offset and length of the SATA PHY register set;
- #phy-cells: must be zero
- clocks: a list of phandles and clock-specifier pairs, one for each entry in
  clock-names.
- clock-names: must be "cfg" for phy config clock.

Example:
	sata_phy: sata-phy@1b400000 {
		compatible = "qcom,apq8064-sata-phy";
		reg = <0x1b400000 0x200>;

		clocks = <&gcc SATA_PHY_CFG_CLK>;
		clock-names = "cfg";

		#phy-cells = <0>;
	};
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Qualcomm IPQ806x SATA PHY Controller
------------------------------------

SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
Each SATA PHY controller should have its own node.

Required properties:
- compatible: compatible list, contains "qcom,ipq806x-sata-phy"
- reg: offset and length of the SATA PHY register set;
- #phy-cells: must be zero
- clocks: must be exactly one entry
- clock-names: must be "cfg"

Example:
	sata_phy: sata-phy@1b400000 {
		compatible = "qcom,ipq806x-sata-phy";
		reg = <0x1b400000 0x200>;

		clocks = <&gcc SATA_PHY_CFG_CLK>;
		clock-names = "cfg";

		#phy-cells = <0>;
	};