Commit 4d25a0d5 authored Oct 01, 2019 by Michael Strauss Committed by Alex Deucher Oct 25, 2019

drm/amd/display: Disable force_single_disp_pipe_split on DCN2+



[WHY]
force_single_disp_pipe_split is a debug flag for use on DCN1
but isn't necessary otherwise as DCN2+ splits by default

Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 71fb7b28

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -863,7 +863,7 @@ static const struct dc_debug_options debug_defaults_drv = {
		.clock_trace = true,
		.disable_pplib_clock_request = true,
		.pipe_split_policy = MPC_SPLIT_DYNAMIC,
		.force_single_disp_pipe_split = true,
		.force_single_disp_pipe_split = false,
		.disable_dcc = DCC_ENABLE,
		.vsr_support = true,
		.performance_trace = false,

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -836,7 +836,7 @@ static const struct dc_debug_options debug_defaults_drv = {
		.clock_trace = true,
		.disable_pplib_clock_request = true,
		.pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
		.force_single_disp_pipe_split = true,
		.force_single_disp_pipe_split = false,
		.disable_dcc = DCC_ENABLE,
		.vsr_support = true,
		.performance_trace = false,