Loading arch/ia64/kernel/pal.S +24 −23 Original line number Diff line number Diff line Loading @@ -21,11 +21,12 @@ pal_entry_point: .text /* * Set the PAL entry point address. This could be written in C code, but we do it here * to keep it all in one module (besides, it's so trivial that it's * Set the PAL entry point address. This could be written in C code, but we * do it here to keep it all in one module (besides, it's so trivial that it's * not a big deal). * * in0 Address of the PAL entry point (text address, NOT a function descriptor). * in0 Address of the PAL entry point (text address, NOT a function * descriptor). */ GLOBAL_ENTRY(ia64_pal_handler_init) alloc r3=ar.pfs,1,0,0,0 Loading @@ -36,9 +37,9 @@ GLOBAL_ENTRY(ia64_pal_handler_init) END(ia64_pal_handler_init) /* * Default PAL call handler. This needs to be coded in assembly because it uses * the static calling convention, i.e., the RSE may not be used and calls are * done via "br.cond" (not "br.call"). * Default PAL call handler. This needs to be coded in assembly because it * uses the static calling convention, i.e., the RSE may not be used and * calls are done via "br.cond" (not "br.call"). */ GLOBAL_ENTRY(ia64_pal_default_handler) mov r8=-1 Loading Loading @@ -92,7 +93,7 @@ END(ia64_pal_call_static) * * Inputs: * in0 Index of PAL service * in2 - in3 Remaning PAL arguments * in2 - in3 Remaining PAL arguments */ GLOBAL_ENTRY(ia64_pal_call_stacked) .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(4) Loading Loading @@ -127,7 +128,7 @@ END(ia64_pal_call_stacked) * * Inputs: * in0 Index of PAL service * in2 - in3 Remaning PAL arguments * in2 - in3 Remaining PAL arguments * * PSR_LP, PSR_TB, PSR_ID, PSR_DA are never set by the kernel. * So we don't need to clear them. Loading Loading @@ -173,7 +174,7 @@ GLOBAL_ENTRY(ia64_pal_call_phys_static) ;; andcm r16=loc3,r16 // removes bits to clear from psr br.call.sptk.many rp=ia64_switch_mode_phys .ret1: mov rp = r8 // install return address (physical) mov rp = r8 // install return address (physical) mov loc5 = r19 mov loc6 = r20 br.cond.sptk.many b7 Loading @@ -183,7 +184,6 @@ GLOBAL_ENTRY(ia64_pal_call_phys_static) mov r19=loc5 mov r20=loc6 br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode .ret2: mov psr.l = loc3 // restore init PSR mov ar.pfs = loc1 Loading @@ -199,7 +199,7 @@ END(ia64_pal_call_phys_static) * * Inputs: * in0 Index of PAL service * in2 - in3 Remaning PAL arguments * in2 - in3 Remaining PAL arguments */ GLOBAL_ENTRY(ia64_pal_call_phys_stacked) .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(5) Loading Loading @@ -252,10 +252,11 @@ GLOBAL_ENTRY(ia64_pal_call_phys_stacked) END(ia64_pal_call_phys_stacked) /* * Save scratch fp scratch regs which aren't saved in pt_regs already (fp10-fp15). * Save scratch fp scratch regs which aren't saved in pt_regs already * (fp10-fp15). * * NOTE: We need to do this since firmware (SAL and PAL) may use any of the scratch * regs fp-low partition. * NOTE: We need to do this since firmware (SAL and PAL) may use any of the * scratch regs fp-low partition. * * Inputs: * in0 Address of stack storage for fp regs Loading Loading
arch/ia64/kernel/pal.S +24 −23 Original line number Diff line number Diff line Loading @@ -21,11 +21,12 @@ pal_entry_point: .text /* * Set the PAL entry point address. This could be written in C code, but we do it here * to keep it all in one module (besides, it's so trivial that it's * Set the PAL entry point address. This could be written in C code, but we * do it here to keep it all in one module (besides, it's so trivial that it's * not a big deal). * * in0 Address of the PAL entry point (text address, NOT a function descriptor). * in0 Address of the PAL entry point (text address, NOT a function * descriptor). */ GLOBAL_ENTRY(ia64_pal_handler_init) alloc r3=ar.pfs,1,0,0,0 Loading @@ -36,9 +37,9 @@ GLOBAL_ENTRY(ia64_pal_handler_init) END(ia64_pal_handler_init) /* * Default PAL call handler. This needs to be coded in assembly because it uses * the static calling convention, i.e., the RSE may not be used and calls are * done via "br.cond" (not "br.call"). * Default PAL call handler. This needs to be coded in assembly because it * uses the static calling convention, i.e., the RSE may not be used and * calls are done via "br.cond" (not "br.call"). */ GLOBAL_ENTRY(ia64_pal_default_handler) mov r8=-1 Loading Loading @@ -92,7 +93,7 @@ END(ia64_pal_call_static) * * Inputs: * in0 Index of PAL service * in2 - in3 Remaning PAL arguments * in2 - in3 Remaining PAL arguments */ GLOBAL_ENTRY(ia64_pal_call_stacked) .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(4) Loading Loading @@ -127,7 +128,7 @@ END(ia64_pal_call_stacked) * * Inputs: * in0 Index of PAL service * in2 - in3 Remaning PAL arguments * in2 - in3 Remaining PAL arguments * * PSR_LP, PSR_TB, PSR_ID, PSR_DA are never set by the kernel. * So we don't need to clear them. Loading Loading @@ -173,7 +174,7 @@ GLOBAL_ENTRY(ia64_pal_call_phys_static) ;; andcm r16=loc3,r16 // removes bits to clear from psr br.call.sptk.many rp=ia64_switch_mode_phys .ret1: mov rp = r8 // install return address (physical) mov rp = r8 // install return address (physical) mov loc5 = r19 mov loc6 = r20 br.cond.sptk.many b7 Loading @@ -183,7 +184,6 @@ GLOBAL_ENTRY(ia64_pal_call_phys_static) mov r19=loc5 mov r20=loc6 br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode .ret2: mov psr.l = loc3 // restore init PSR mov ar.pfs = loc1 Loading @@ -199,7 +199,7 @@ END(ia64_pal_call_phys_static) * * Inputs: * in0 Index of PAL service * in2 - in3 Remaning PAL arguments * in2 - in3 Remaining PAL arguments */ GLOBAL_ENTRY(ia64_pal_call_phys_stacked) .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(5) Loading Loading @@ -252,10 +252,11 @@ GLOBAL_ENTRY(ia64_pal_call_phys_stacked) END(ia64_pal_call_phys_stacked) /* * Save scratch fp scratch regs which aren't saved in pt_regs already (fp10-fp15). * Save scratch fp scratch regs which aren't saved in pt_regs already * (fp10-fp15). * * NOTE: We need to do this since firmware (SAL and PAL) may use any of the scratch * regs fp-low partition. * NOTE: We need to do this since firmware (SAL and PAL) may use any of the * scratch regs fp-low partition. * * Inputs: * in0 Address of stack storage for fp regs Loading