Commit 4da11b92 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/gfx12: re-emit unprocessed state on ring reset 



Re-emit the unprocessed state after resetting the queue.
Drop the soft_recovery callbacks as the queue reset replaces
it.

Reviewed-by: default avatarJesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fa3385ac

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

+4 −31
Original line number Diff line number Diff line
@@ -4694,21 +4694,6 @@ static void gfx_v12_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring, 
			       ref, mask, 0x20);

}



static void gfx_v12_0_ring_soft_recovery(struct amdgpu_ring *ring,

					 unsigned vmid)

{

	struct amdgpu_device *adev = ring->adev;

	uint32_t value = 0;



	value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03);

	value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01);

	value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1);

	value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid);

	amdgpu_gfx_rlc_enter_safe_mode(adev, 0);

	WREG32_SOC15(GC, 0, regSQ_CMD, value);

	amdgpu_gfx_rlc_exit_safe_mode(adev, 0);

}



static void

gfx_v12_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,

				      uint32_t me, uint32_t pipe,
@@ -5321,7 +5306,7 @@ static int gfx_v12_0_reset_kgq(struct amdgpu_ring *ring, 
	if (!(adev->gfx.gfx_supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))

		return -EOPNOTSUPP;



	drm_sched_wqueue_stop(&ring->sched);

	amdgpu_ring_reset_helper_begin(ring, timedout_fence);



	r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);

	if (r) {
@@ -5343,12 +5328,7 @@ static int gfx_v12_0_reset_kgq(struct amdgpu_ring *ring, 
		return r;

	}



	r = amdgpu_ring_test_ring(ring);

	if (r)

		return r;

	amdgpu_fence_driver_force_completion(ring);

	drm_sched_wqueue_start(&ring->sched);

	return 0;

	return amdgpu_ring_reset_helper_end(ring, timedout_fence);

}



static int gfx_v12_0_reset_compute_pipe(struct amdgpu_ring *ring)
@@ -5444,7 +5424,7 @@ static int gfx_v12_0_reset_kcq(struct amdgpu_ring *ring, 
	if (!(adev->gfx.compute_supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))

		return -EOPNOTSUPP;



	drm_sched_wqueue_stop(&ring->sched);

	amdgpu_ring_reset_helper_begin(ring, timedout_fence);



	r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, true);

	if (r) {
@@ -5465,12 +5445,7 @@ static int gfx_v12_0_reset_kcq(struct amdgpu_ring *ring, 
		return r;

	}



	r = amdgpu_ring_test_ring(ring);

	if (r)

		return r;

	amdgpu_fence_driver_force_completion(ring);

	drm_sched_wqueue_start(&ring->sched);

	return 0;

	return amdgpu_ring_reset_helper_end(ring, timedout_fence);

}



static void gfx_v12_0_ring_begin_use(struct amdgpu_ring *ring)
@@ -5548,7 +5523,6 @@ static const struct amdgpu_ring_funcs gfx_v12_0_ring_funcs_gfx = { 
	.emit_wreg = gfx_v12_0_ring_emit_wreg,

	.emit_reg_wait = gfx_v12_0_ring_emit_reg_wait,

	.emit_reg_write_reg_wait = gfx_v12_0_ring_emit_reg_write_reg_wait,

	.soft_recovery = gfx_v12_0_ring_soft_recovery,

	.emit_mem_sync = gfx_v12_0_emit_mem_sync,

	.reset = gfx_v12_0_reset_kgq,

	.emit_cleaner_shader = gfx_v12_0_ring_emit_cleaner_shader,
@@ -5587,7 +5561,6 @@ static const struct amdgpu_ring_funcs gfx_v12_0_ring_funcs_compute = { 
	.emit_wreg = gfx_v12_0_ring_emit_wreg,

	.emit_reg_wait = gfx_v12_0_ring_emit_reg_wait,

	.emit_reg_write_reg_wait = gfx_v12_0_ring_emit_reg_write_reg_wait,

	.soft_recovery = gfx_v12_0_ring_soft_recovery,

	.emit_mem_sync = gfx_v12_0_emit_mem_sync,

	.reset = gfx_v12_0_reset_kcq,

	.emit_cleaner_shader = gfx_v12_0_ring_emit_cleaner_shader,